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An apparatus and method to improve FSI plug detect

IP.com Disclosure Number: IPCOM000237909D
Publication Date: 2014-Jul-21
Document File: 2 page(s) / 281K

Publishing Venue

The IP.com Prior Art Database

Abstract

This disclosure improves the stability of the plug detect of hot plugging components by synchronizing the plug detect with the components reset instead of using a pure voltage level driven approach.

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Page 01 of 2

Disclosed is a circuit to improve the plug detection of hot plugging components (Field Replaceable Unit) in a system Z mainframe using the FSI (FRU Service Interface) protocol for configuration and controlling purposes.

The FSI protocol uses a two wire interface (FSI-Clock and FSI-Data) to configure and control FRUs. Fig. 1 depicts a typical implementation of this interface. While the FSI-Clock line is only used for clocking purposes, the FSI-Data line is also used for hotplug detection. On system side, the FSI-Data has a pull-down resistor RHigh to ground while on FRU side a weaker pull-up resistor R1Low is connected to Vcc. A hotplug of a device can therefore be detected by a transition from low to high voltage on the FSI-Data line.

Fig. 1 State of the art implementation of the FSI interface

This implementation showed two issues. Plugging a FRU can be a very slow process which can take many seconds while the FSI-Data line toggles several times and indicates plug and unplug conditions. Additionally pin bouncing with a higher frequency overlays the slower plug/unplug conditions caused when the FRU is mounted sloped. This fact makes it difficult to decide when the FRU is really plugged and operational or the FRU is plugged but can not communicate via the FSI protocol because of a fault. In addition, the reset circuit also depicted in Fig. 1 introduces an additional, FRU type dependent delay between a stable hotplug indication and the point where the FSI Slave lea...