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Method for Producing Balanced Pseudo Random Data Patterns

IP.com Disclosure Number: IPCOM000238198D
Publication Date: 2014-Aug-07
Document File: 2 page(s) / 37K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for producing balanced pseudo random data patterns.

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This is the abbreviated version, containing approximately 100% of the total text.

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Method for Producing Balanced Pseudo Random Data Patterns

IO designs desire to use known pseudo random data patterns that can be driven from the drive side and detected on the receive side. Certain algorithms on those IO's desire a balanced number of logic 1's and logic 0's to help train various settings. Traditional pseudo random bit streams (PRBS) generated with a linear feedback shift register (LFSR) repeat every 2^N-1 elements and are thus always unbalanced as there is an odd number of bits in the pattern.

    This invention is to take a PRBS pattern and detect when the pattern is beginning to repeat. Once it begins repeating, invert the bit stream. The end effect is to produce a bit stream of 2*(2^N-1) where the second half is the Boolean opposite of the first half.

    The simplest implementation of this idea is to use an LFSR to generate a PRBS pattern. That pattern then feeds two elements, first an inverter and second a mux. The mux second data input is from the inverter. The mux is then controlled from a counter set to the repeating length of the PRBS pattern (see Figure 1 below).

Figure 1

    
A second more optimized implementation is to replace the PRBS counter with a comparator that identifies one particular spot in the PRBS pattern. This detected signal can be used to toggle a latch that is used to control the Mux (see Figure 2 below).

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Figure 2

    
A third implementation is to simplify the hold mux with an XOR signal (see Figure 3 below).

Figure 3

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