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Low Temperature LPCVD Poly Process for Deep Trench Fill

IP.com Disclosure Number: IPCOM000238472D
Publication Date: 2014-Aug-27
Document File: 2 page(s) / 157K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method to improve deep trench fill with the amorphous Silicon (Si) through low temperature Low Pressure Chemical Vapor Deposition (LPCVD) processing.

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Low Temperature LPCVD Poly Process for Deep Trench Fill

The embedded Dynamic Random Access Memory (eDRAM) is one of the key performance boosters for high end chips. The Arsenic (As)-doped amorphous Silicon (Si) has been used to fill the deep trench to form the top electrode (poly1) and connect the trench and active area by forming a buried strap (poly2) for many generations of technology nodes. As the ever-decreasing trench dimension requires less amorphous Si to fill the trenches, the reliability of the material becomes a critical issue in 32nm and 22nm nodes. The incomplete fill and void formation in the material can lead to wide process variation (e.g., Recess (RC1) depth) and damage to the node film, which significantly affects the device's functional yield (e.g., Deep Trench-active area (DT-RX) shorts/opens, Bit Line-Buried Plate (BL-BP) leakage, etc.).

The novel contribution is a method to improve deep trench fill with the amorphous Si through low temperature Low Pressure Chemical Vapor Deposition (LPCVD) processing. The results show a more conformal a-Si film in the DT sidewall and smaller/narrower voids and seams.

As-doping during a-Si deposition degrades conformality and causes large voids and seam. A lower deposition temperature (480~500C) reduces the effect of the As poisoning and produces more conformal deposition with smaller voids and seam. The major improvement of the film conformality comes from low temperature processing, which allows higher nuc...