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Efficient Mechanism to Test Memory Subsystems with Mixed Vendor DIMMs in Servers

IP.com Disclosure Number: IPCOM000238657D
Publication Date: 2014-Sep-10
Document File: 2 page(s) / 61K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is an efficient mechanism to test memory subsystems with mixed vendor DIMMs in servers

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Efficient Mechanism to Test Memory Subsystems with Mixed Vendor DIMMs in Servers

This disclosure describes a mechanism of testing mixed vendor memory DIMMs efficiently. With this mechanism, the savings may be about 40% in expenditure for purchasing memory DIMMs which are expensive. There are no drawbacks of this mechanism. On the other hand, it increases coverage with the utilization of fewer memory DIMMs.

The idea is to identify the fact that when there is insufficient electrical margins, the failure will happen within one memory channel, the across two memory channels on a single processor and lastly between two memory channels on different processors.

The following shows the idea and how it was implemented.

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