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Method of using installed components of DIMMs to limit a memory RAS option at setup

IP.com Disclosure Number: IPCOM000238858D
Publication Date: 2014-Sep-22
Document File: 5 page(s) / 142K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a system to assess current installed components of a Dual In Line Memory Module (DIMM) and deny the ability to change the Reliability, Availability, and Serviceability (RAS) memory mode if a system is inadequately equipped.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 44% of the total text.

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Method of using installed components of DIMMs to limit a memory RAS option at setup

Current Unified Extensible Firmware Interface (UEFI) code intercepts and generates errors when population errors are detected. However, there is no way to limit the Reliability, Availability, and Serviceability (RAS) memory states that can be set in order to prevent a boot from encountering the population error on the next boot.

Given the complexities of memory configuration and the many modes that users can assign to memory, there is a need to have RAS capabilities/options validated so that users do not allow setup menus to configure a method that cannot boot. Many systems now have 48 and 96 Dual In Line Memory Modules (DIMMs). The population orders for those systems differ depending on the RAS memory setting.

The novel contribution is a system to assess current installed components and deny the ability to change the RAS memory mode if a system is inadequately equipped. The system comprises methods to:


 Limit the memory RAS modes based on DIMM population order


 Allow the customer to establish a preference and then use that preference mode (e.g., independent, mirror, sparing) to choose best mode

UEFI setup menus manage how a system allows memory reconfiguration. Using an Ivy Bridge* processor, the following details some of the memory requirements and modes involved in the novel method.

Independent Mode (Performance) Installation Order

DIMMs can be populated in any order in Independent Mode. However, each offering uses a dedicated installation order, which yields the best performance. Individual DIMMs are installed based on a memory controller round robin and alternating between Double Data Rate (DDR) channels (e.g., SMI0 Ch0, SMI2 Ch0, SMI1 Ch1, SMI3 Ch1, SMI0 Ch1, SMI2 Ch1, SMI1 Ch0, SMI3 Ch0). As most systems
have a different number of DIMMs per channel, Memory Controllers, and number of Central Processing Units (CPUs) this is platform dependent.

Figure 1: Independent Mode (Performance) Installation Order

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Independent (Performance) + Mirror Mode Installation Order

DIMMs are required to be installed as two DIMM sets. DIMM sets are installed based on a memory controller round robin and alternating between mirrored DDR channels (SMI0 Ch0 + SMI1 Ch0, SMI2 Ch0 + SMI3 Ch0, SMI0 Ch1 + SMI1 Ch1, SMI2 Ch1 + SMI3 Ch1). Mirrored channels must be identically populated. Each DIMM installed in one channel must have a DIMM of identical organization (i.e., matching capacities and Dynamic Random Access Memory (DRAM) organization) installed in the mirrored channel's corresponding DIMM slot.

Figure 2: List of components for Independent (Performance) + Mirror Mode Installation

Figure 3: Independent (Performance) + Mirror Mode Installation Order

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Lockstep Mode (RAS) Installation Order

DIMMs are required to be installed as two DIMM sets. DIMM sets are installed based on a memory controller round robin and alternating between lockstepp...