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Enhanced AMBA-AHB/AXI atomic access operation

IP.com Disclosure Number: IPCOM000239075D
Publication Date: 2014-Oct-09
Document File: 6 page(s) / 216K

Publishing Venue

The IP.com Prior Art Database

Abstract

AMBA-AHB/AXI interface is widely used as the main interconnect bus in a SoC. With increasing complexity of SoCs, there is a need for atomic access in terms of cost and performance. One atomic access type – address-lock type is proposed to support critical/non-critical data access simultaneously according to address range. It also can improve bandwidth performance and reduce software cost. By using current AHB/AXI lock signals to do the extension, it’s 100% back-wards compatible with current protocol.

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Enhanced  AMBA-AHB/AXI  atomic access operation

Abstract:

AMBA-AHB/AXI interface is widely used as the main interconnect bus in a SoC.  With increasing complexity of SoCs, there is a need for atomic access in terms of cost and performance.  One atomic access type – address-lock type is proposed to support critical/non-critical data access simultaneously according to address range.  It also can improve bandwidth performance and reduce software cost.  By using current AHB/AXI lock signals to do the extension, it’s 100% back-wards compatible with current protocol. 

I. Introduction

In recent years AMBA-AHB/AXI has become the main-stream interface for 3rd party IP and key interconnect in SoC, especially ARM® Core based products.  At the same time, with new feature and new requirement from the market, the operating system has become more complex, which in turn puts stringent requests for an IPC (inter-process communication) with minimum system cost.  The atomic operation a key procedure used to protect critical data and is never broken by other threads or processes.  So far, the current atomic type in AHB/AXI is either quite simple by monitoring the reserved address to see if accessed by other master or not, or locking the whole bus completely to prevent all bus access.  Both types are with the cost of software intervention (monitor type) or bandwidth sacrifice.  Now the proposed address-locked type is addressing above limitations – the other masters are allowed to access any address except the locked address, so the target master will lock critical data address without any interrupt by other masters and it doesn’t prevent normal access from other masters for other addresses.  The below paragraph is split into three parts – the first part introduces current atomic operation in AHB/AXI and their limitation; the second part illustrates detail of a proposed address-locked atomic type and its algorithm; and the last part does a comparison and provides an example on the benefit.  The conclusion will be given after that.

II  AMBA-AHB/AXI current atomic operation

First of all, let’s introduce relative signals. For AHB, one-bit HLOCK signal is assigned for atomic access. Seen from Table 1, when HLOCKx is asserted high, it indicates to the arbiter that the arbiter must not grant other master access once the first transfer of this locked transfer has started.  

HLOCKx

The lock signal is asserted by a master at the same time as the bus request signal. This indicates to the arbiter that the master is performing a number of indivisible transfers and the arbiter must not grant any other bus master access to the bus once the first

transfer of the locked transfers has commenced. HLOCKx must be asserted at least a cycle before the address to which it refers, in order to prevent the arbiter from changing the grant signals.

         

Table 1  AHB HLOCK description1

For AXI, there are two kinds of 2-bit lock signals , one for re...