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Compact model of mutual inductance

IP.com Disclosure Number: IPCOM000239167D
Publication Date: 2014-Oct-19
Document File: 5 page(s) / 408K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a model that uses physical attributes to enable a scalable, physics-based model prediction for Through Silicon Via.

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Compact model of mutual inductance

  The Through Silicon Via (TSV), or Through-Wafer-Via (TWV), is a vertical interconnection method that lends itself to a variety of applications; the most notable being it's use as an interconnect for 3-dimensional circuit integration (3D IC). IBM has targeted its use as low inductance ground connections for RFIC's, as well as noise isolation barriers. TSV vertical leads are traditionally circular in shape and made out of copper, tungsten or plated gold.

IBM's TSV for RFIC application is made up of parallel metal slots with low inductance and resistance. All the slots are connected in parallel by M1 metal and the wafer backside metal; Figure 1 shows a schematic cross section of a 5 slot TSV. Each slots has its own self inductance and a series of mutual inductances to all the other slots in the device. Accurately characterizing and modeling this device is of

great importance for customer adoption. The mutual inductance between slots is not negligible. Furthermore, model complexity grows with larger devices, i.e. number of slots, as one accounts for the mutual inductance to more and more distant slots. For example, current in one slot affects that in another and that in turn effects current in the original slot.

The device is presently modeled by using discrete elements (R and L) and creating mutual inductance function between all the slots. The model does not capture the frequency sensitivity that physically takes place in the device, and it is not scalable.

Any customer request for larger devices sizes that is not currently supported

inv...