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Method and System Providing a Handler to Sequence Level 2 Branch Target Buffer (BTB2) Operations in Accordance to eDRAM Restrictions

IP.com Disclosure Number: IPCOM000239437D
Publication Date: 2014-Nov-06
Document File: 2 page(s) / 46K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method and system is disclosed for providing a handler to sequence Level 2 Branch Target Buffer (BTB2) operations in accordance to eDRAM restrictions on reads, writes and refreshes.

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Method and System Providing a Handler to Sequence Level 2 Branch Target Buffer (BTB2) Operations in Accordance to eDRAM Restrictions

The Level 2 Branch Target Buffer (BTB2) stores information about previously encountered branches. The BTB2 is not directly used to make branch predictions; instead BTB2 holds branches that do not fit in the BTB1. Upon a BTB1 miss, the BTB2 is searched and matching branches in the BTB2 page are moved into a BTBP. The BTB2 is logically 6-way set associative, 16k rows deep and is indexed by instruction address bits 44:57. The BTB2 has a 64 Byte line size compared to the 32 Byte line sizes of the BTB1 and BTBP. Each of the 16k rows consist of 6 72-bit entries / columns labeled as A=1,B=2,C=3,D=4,E=5,F=6. So the BTB2 contains 16k x 6 x 72b = 7,077,888 bits = 6.75 Mb. The 6.75 Mb BTB2 is implemented with 6 instances of the
1.125 Mb embedded DRAM (eDRAM). Each instance of an array consists of 2 512 x 8-way x 144-bit sub arrays (banks). Each sub array is divided into a left and right 72-bit half. The 6 array instances are used to implement a logically 16k x 6-way 72-bit entry structure, indexed with a 14-bit index of branch address bits 44:57.

Disclosed is a method and system for providing a handler to sequence BTB2 operations in accordance to eDRAM restrictions on reads, writes and refreshes. A

BTB2 array instance contains four banks including even instances and odd instances that are considered to be separate banks. The banks are bank 0 (bits 53:54=00): upper bank in even array instances 0, 2, 4, bank 1 (bits 53:54=01): upper bank in odd array instances 1, 3, 5 bank 2 (bits 53:54=10): lower bank in even array instances 0, 2, 4, bank 3 (bits 53:54=11), lower bank in odd array instances 1, 3, 5.

The method and system places input constraints on minimum command spacing for BTB2 as 12 cycles to a same bank (upper/lower) and minimum command spacing for alternate banks as 4 cycles. Further, the input constraints do not allow simultaneous commands (wrt/read/ref) to the same bank or simultaneous commands to both banks in any combination. The input constraints also require that a RA input be zero for at least one cycle before a command and alternatively, RA is allowed to be of same value one cycle before and during a command. RA input is held for one additional cycle following a command. The input constraints are also placed on LS inputs wherein the LS inputs require being zero-or-one-hot and violation of the input constraint results in data corruption. A LS input is asserted only on the bank that receives the read command

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