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Using Selective Memory State Inversion to Extend the Life of Nonvolatile Memory

IP.com Disclosure Number: IPCOM000239452D
Publication Date: 2014-Nov-07
Document File: 3 page(s) / 98K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a concept that minimizes the wear on the nonvolatile memory by minimizing the changes of states of the memory cells.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 56% of the total text.

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Using Selective Memory State Inversion to Extend the Life of Nonvolatile Memory

  An example of wear-out on a nonvolatile memory would be using the Flash memory. The writing of the state entails tunneling electrons through an oxide into a floating gate. Electrons can get captured creating charged states that can make the floating gate appear charged when it is not supposed to have a charge, and this will mean the wrong state will be read. Other nonvolatile memories have different mechanisms for failure, but the trend is the same, more usage will wear out the memory. The mechanism for failure will be dominated by either writing a 0 or a 1, depending on the technology being incorporated (see Figure 1 below).

Figure 1: Flash error rate increases with cycles of use.

    The idea being proposed is using counting or predictive means so that when a 'page' of data is written to the memory, the number of 0's and 1's on the page can be estimated.

    Suppose for the given technology being employed, writing a 0 causes more wear on the memory cell. If there are more 0's on the page then 1's, then this idea is to flip the data 0's to 1's and 1's to 0's and create an extra of data that records if the data is in the true of compliment state. The data would then be written to the memory with fewer cells being disturbed. The details of how a write would work are shown in Figure 2, and the corresponding read methodology is shown in Figure 3 below.

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Figure 2

Figure 3

A variati...