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Method for Introducing Stacked Barriers for Forming Advanced Copper (Cu) Interconnect Structures

IP.com Disclosure Number: IPCOM000240428D
Publication Date: 2015-Jan-29
Document File: 4 page(s) / 117K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method is disclosed for introducing stacked barriers for forming advanced copper (Cu) interconnect structures.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 51% of the total text.

Page 01 of 4

Method for Introducing Stacked Barriers for Forming Advanced Copper (Cu) Interconnect Structures

As device dimension shrinks, interconnect resistance and via resistance dominates RC delay of Integrated Circuit (IC) chips. Reducing line resistance (line R) and via resistance (via R) is a key to achieve high speed, low power dissipation devices. In order to reduce line R and via R, one of the approaches is using a self-forming barrier (SFB) method, which does not use a metal barrier such as Tantalum Nitride (TaN), resulting in the formation of a Manganese Silicate (MnSiO3) dielectric barrier along the sidewall and bottom of lines and the sidewall of vias. Such MnSiO3 SFB is formed through diffusion of Manganese (Mn) in Copper-Manganese (CuMn) alloy to the dielectric Cu interface and the subsequent reaction of Mn with Oxygen (O2) and Silicon (Si). Because of the absence of the TaN barrier, the Cu volume becomes larger and via R gets smaller. However, the MnSiO3/Cu interface allows void nucleation and the CuMn layer has a poor adhesion to Cu.

An advanced SFB approach such as, for example, "Through-Co Self Forming Barrier" (TCSFB), allows deposition of a CVD-Co layer on top of dielectric surface can. Deposition of the CVD-Co layer is generally followed by CuMn seed deposition. By taking this advanced approach, the Co/Cu interface is formed which has a strong adhesion leading to high reliability (electromigration and stress migration). Another advantage of the TCSFB is the existence of the blocking boundary at the via bottom. That is, a barrier layer which works as the blocking boundary against Cu diffusion through the via is required so that the circuit design can utilize the theoretically immortal EM lifetime due to the EM short length effect. However, pure-Co layer formed by CVD-Co or PVD-Co has an insufficient capability to work as the block...