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TECHNIQUE TO DETECT AND DISTINGUISH BETWEEN TRIP EVENTS

IP.com Disclosure Number: IPCOM000240468D
Publication Date: 2015-Feb-02
Document File: 4 page(s) / 91K

Publishing Venue

The IP.com Prior Art Database

Abstract

The present invention provides a technique to record and store trip events derived from peripheral devices, modules or circuitry. Each peripheral device, module or circuitry that has access to ETU trip circuitry is equipped with a detection or memory circuit. The ETU detects presence of an active trip signal by resetting the memory and immediately reading the memory. According to an embodiment of the invention, when the ETU detects presence of an active trip signal commanded by the peripheral device, module, or circuitry the ETU aids the trip signal by lengthening, shortening, pulsing or halting as required. According to another embodiment of the invention, when the ETU detects memory of a trip commanded by the peripheral device, module or circuitry, the ETU stores information in an event log for diagnostics. According to yet another embodiment of the invention, when the ETU detects memory of a trip commanded by the peripheral device, module or circuitry, the ETU provides positive feedback to a user.

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This is the abbreviated version, containing approximately 39% of the total text.

Page 01 of 4

TECHNIQUE TO DETECT AND DISTINGUISH BETWEEN TRIP EVENTS

BACKGROUND

The present invention relates generally to an electronic trip unit (ETU) and more particularly to a technique for detecting and distinguishing between a trip event that is commanded by peripherals and that by an ETU core processor.

Generally, peripheral devices operate independent of an electronic trip unit (ETU) and do not require ETU power or presence of ETU protections microprocessor. Such devices, modules, or circuitry include a residual current device (RCD) module, shunt trip module, over/under voltage module, push-to-trip test circuitry, analog instantaneous circuitry and MCR circuitry among others.

The ETU protections processor has a separate or lagging power source that interfaces with an ETU trip circuitry. The lagging power source of ETU protections processor is separate from that of the peripheral devices, modules or circuits. ETU protections processor has certain time lag associated with internal initialization and algorithms whereas the peripheral devices, modules, or circuits are powered on instantly. The peripheral devices, modules, or circuits may command a trip while the ETU protections processor is initializing. However, conventional techniques do not allow the ETU to detect such trip events commanded by peripheral devices, modules, or peripheral circuitry.

It would be desirable to have an efficient technique that allows ETU to interact with peripheral devices, modules, or peripheral circuitry and detect trip events commanded by peripheral devices, modules, or peripheral circuitry.

BRIEF DESCRIPTION OF THE DRAWING

Figure 1 is a block diagram depicting an electronic trip unit actuator trip memory circuit.

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Page 02 of 4

DETAILED DESCRIPTION

The present invention provides a technique to record and store trip events derived from peripheral devices, modules or circuitry to a memory. The memory relates directly to point of origin of a trip event commanded by peripheral devices, modules or circuitry.

Each peripheral device, module, or circuitry that has access to ETU trip circuitry is equipped with a detection or memory circuit. The detection or memory circuit attains power from trip signal directly where trip signal is derived from peripheral device, module, or circuitry and is irrespective of the state of power of ETU. The power is also used to retain state of memory until the ETU protections microprocessor extracts or erases memory at a later time. In order to ensure memory retention, the ETU includes circuitry with low-leakage components coupled with bulk storage components.

In order to ensure that state of memory is maintained, the ETU includes circuitry for memory. The memory is either in form of certain discrete input, for example, latching which is one-shot type or momentary resistor-capacitor (RC) time constant associated with an analog to digital converter (ADC) input or in the form of a sub-system. The sub-system may include separate memory...