Browse Prior Art Database

Segmented Boundary Scan for Test Cost Reduction

IP.com Disclosure Number: IPCOM000240495D
Publication Date: 2015-Feb-03
Document File: 3 page(s) / 313K

Publishing Venue

The IP.com Prior Art Database

Abstract

Interconnect testing between different SoCs on a single board is carried through boundary-scan by making a long daisy-chain across devices. The boundary-scan infrastructure is also used for pin parametric testing and characterization at SoC level before shipping out the device to the customer. The pin parametric test contains testing of electric characteristics for each pad and adds to the overall device test cost. This paper describes a scheme to reduce the test-cost by segmenting the boundary scan chain based on the pads under test.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Segmented Boundary Scan for Test Cost Reduction

Abstract:

Interconnect testing between different SoCs on a single board is carried through boundary-scan by making a long daisy-chain across devices. The boundary-scan infrastructure is also used for pin parametric testing and characterization at SoC level before shipping out the device to the customer. The pin parametric test contains testing of electric characteristics for each pad and adds to the overall device test cost. This paper describes a scheme to reduce the test-cost by segmenting the boundary scan chain based on the pads under test.

Problem Statement:

Boundary scan patterns are used to characterise the pads for IO levels are pin characteristics (VOL/VOH, VIL/VIH, leakage, pull-up/down etc).

1)      Pin characterization is run into small sets to avoid ground-bounce issue

When all outputs toggle at the same time, there can be transient glitches called ground-bounce issue. During VOH/VOL testing, if all pads are switched to o/p for parametric measurement, ground bounce may be triggered corrupting the measurement.

This is a test-only issue, as application may not excite all o/p simultaneously

To avoid this issue, boundary scan patterns do not test all the pins simultaneously; but execute in groups - typically 10 pads at a time.

However, the loading and unloading structure is common (bscan chain), so even though a set of pads are tested, extra tester time needed to load entire chain

2)      Parametric Testing Sequence is run multiple times for a single unit

As shown in above figure, the entire boundary scan sequence is run multiple ti...