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In-Line Electrical Characterization of Metal/Via Offset using Diagnostic Structures

IP.com Disclosure Number: IPCOM000240524D
Publication Date: 2015-Feb-05
Document File: 3 page(s) / 358K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is an in-situ method and structure to diagnose metal/via offset due to overlay, foreshortening, etch bias etc., through electrical measurement.

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In-Line Electrical Characterization of Metal/Via Offset using Diagnostic Structures

Metal/via offset induces reliability fails (e.g., offset induced local joule heating) or performance degradation (e.g., increased leakage current, signal loss). The existing optical methods to check metal/via offset are time-consuming and do not provide a clear source for the offset. For instance, offset can be induced due to overlay, foreshortening, etch bias and so on, or the combination of these effects.

The existing method to check offset is through optical inspection, which is very time

consuming.

Figure 1: Electromigration failure distribution indicating early fails due to via/metal offset

The solution is to use electrical tests to quantitatively assess the offset and potentially identify the source by employing multiple novel test structures (Figures 2-5).

The novel contribution is an electrical means to characterize metal/via offset using a dielectric breakdown property. This new diagnostic methodology enables deconvolution effects of overlay vs. foreshortening from the overall offset. In addition, since this is a typical two-point electrical measurement, it is amenable for in-line test and is highly scalable.

This in-situ method and structure diagnoses metal/via offset due to overlay, foreshortening, etch bias etc., through electrical measurement. The process includes:

1. Employing dielectric breakdown property to determine the offset between metal/via and via/adjacent m...