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A novel method for reducing ground leakage current in two-stage gridconnected photovoltaic inverter

IP.com Disclosure Number: IPCOM000241438D
Publication Date: 2015-Apr-27
Document File: 5 page(s) / 188K

Publishing Venue

The IP.com Prior Art Database

Related People

Juha Jokipii: INVENTOR

Abstract

This document discloses a method for reducing ground leakage current in two-stage gridconnected photovoltaic inverter. The novel method reduces significantly the ground leakage current in a PV system when compared to a conventional two-stage solution.

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A novel method for reducing ground leakage current in two-stage grid- connected photovoltaic inverter


1.Abstract

This document discloses a method for reducing ground leakage current in two-stage grid- connected photovoltaic inverter. The novel method reduces significantly the ground leakage current in a PV system when compared to a conventional two-stage solution.


2.Background

Ground leakage currents are one the main issues in design of single and three-phase grid- connected transformerless photovoltaic (PV) inverters. As a result, a lot of different circuit structures, filter configurations, and control methods that aims reduction of the level of the ground leakage current have been proposed [1], [2], [3]. In this proposal, a novel method for reducing the level of the ground leakage current in two-stage grid-connected inverter is introduced.

dc

i

P

i

p

i

C

S bp

S cp

ap

S

r L

L

a

b

C

c

i

v

L-(a,b,c)

L-(a,b,c)

S bn

S cn

an

S

N

D

i

1

Co

L

1

i

L1

i

C

o

Cin

C

S

in

L

boost

1

i

pv+

pv

R

g

v

dc

n

g

C

g

v

pv

C

o-(a,b,c)


i o-(a,b,c)

v

i

l

R

g

pv-

boost stage

inverter stage

Figure 1. Power stage of a VSI-type two-stage grid-connected inverter.

In a conventional VSI-type two-stage (cascade connection of a boost stage and an inverter stage) grid-connected three-phase inverter shown in Fig. 1, an undesired common mode voltage appears between the dc-bus terminals (node N and P) and the circuit ground (node
n). The origin of the voltage is in pulse-width modulation of the inverter bridge, and cannot be easily avoided. Same problem is present also in single-phase inverters.

In a conventional boost stage (as in Fig. 1), the negative rail is common between the input and output terminals. As a result, the common mode voltage generated by the inverter stage appears also between the input terminals of the boost stage and terminals of the PV module. Every time the common mode voltage potential is varied, a current spike flows through the ground leakage capacitor Cg and creates leakage current (denoted by il in Fig. 1) through the PE-conductor of the system. The amount of leakage current is limited by the EMC-standards and additional filters must be installed to the inverter to reduce the level of the leakage current to an acceptable level.


3.New solution

Origin of the common-mode voltage

As said before, the common mode voltage originates from the pulse-width modulation used to synthesize the voltages generated by the inverter bridge. There are eight possible

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switching state combinations (see Table 1) in a VSI-type inverter bridge. The common mode voltage is related to the zero-sequence component of the inverter bridge voltage shown eq.
(1).

   3
v v v v

   (1)

Table 1. Switching states of a VSI type inverter bridge.

1  

0 aN bN cN

switching state vaN...