Browse Prior Art Database

General Vector Masking Functionality and Encoding

IP.com Disclosure Number: IPCOM000241486D
Publication Date: 2015-May-05
Document File: 4 page(s) / 69K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is an improved method to control the granularity of vector instructions. The method uses a generalized vector mask (GVM) register with two or more bits associated with each element of a vector instruction to represent multiple states and attributes.

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General Vector Masking Functionality and Encoding

Vector mask registers are a known solution to controlling the granularity of vector instructions. In original form, vector instructions are executed for all elements of a vector (i.e. for a vector of N elements, N individual operations are executed). Those operations can be logic, arithmetic, loads, and stores. Vector masks were introduced to control the granularity of operations at the individual element level . Typically, each element of a vector is associated with a bit in the vector mask . If that bit is 1 (or active), for example, then the operation is executed for that element . If that bit is 0 (or inactive), then the operation for that element is skipped .

Vector masks work well when a vector instruction cannot be stopped or suspended , because it can be performed for all the active elements and then execution can continue to the next instruction without any changes to the vector mask .

However, for instructions that can be stopped or suspended , vector masks provide an unsatisfactory solution. If an instruction is halfway through the vector when it needs to be suspended or stopped, two alternatives are present. Both approaches have been used in the art.

One alternative is to leave the vector mask unmodified , so it does not say anything about which element operations have been completed yet . In this case, a restart/resume of the instruction re-executes operations on elements that have already completed. This may not be semantically correct in some cases (e.g., any operation

with a side effect, like a store) or may not be able to guarantee forward progress (e.g., loads/stores).

The other alternative is to modify the vector mask so that the element operations that have been completed show as inactive (0). In this case, the vector mask is (possibly) destroyed at end of execution of the instruction and needs to be reloaded from some saved state.

A third solution is to use a separate "vector completion" register that remembers which of the active elements have already completed in a current vector instruction . In this case, there is no need to update the vector mask as the individual element operations complete. If the instruction has to be stopped/suspended and then restarted/resumed, then the vector completion mask is used to prevent execution for those elements already completed. The vector completion register has to be reset when an instruction finally completes or the time at which it is first tried.*

Neither case provides a satisfactory solution using only a single vector mask register .

The novel solution is a method to use a generalized vector mask (GVM) register with two or more bits associated with each element of a vector instruction to represent multiple states and attributes.

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The GVM scales as the number of bits increased per element to express additional states and attributes of a vector instruction. A GVM can indicate the:

• Completion progres...