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Integrated circuits with FinFETs and resistors

IP.com Disclosure Number: IPCOM000241490D
Publication Date: 2015-May-05
Document File: 2 page(s) / 67K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method and structure for forming high precision on-chip resistors that are fully compatible with fin Field Effect Transistor Complimentary Metal-Oxide Semiconductor flow.

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Integrated circuits with FinFETs and resistors

The fin Field Effect Transistor (finFET) is the current state of the art device option for Complimentary Metal-Oxide Semiconductor (CMOS) technology. On-chip resistors are essential elements for semiconductor chips used in a variety of applications such as system-on-chips.

The conventional polysilicon resistors have the drawbacks of incompatibility with high-k/metal gate (increasing process cost due to extra mask to remove metal layer under polysilicon). The implanted resistors in active silicon layers suffer from the drawback of resistance variation due to the constrained thermal budget in the advanced CMOS technology - dopant activation varies depending on thermal budget .

The novel contribution is a method and structure for forming high precision on -chip resistors that are fully compatible with finFET CMOS flow.

The following figures represent the implementation for the process flow in a preferred embodiment (only the resistor region is shown).

Figure 1: Process


1. Start with a semiconductor substrate (e.g., Silicon on Insulator (SOI))


2. Form fins (e.g., by using spacer imaging transfer)

Figure 2: Process, cont'd.


3. Form finFET gates (not shown)

4. Perform in-situ doped epitaxy growth to form merged source/drain for finFET

      a. for nFET: in-situ phosphorus doped Si:C or Si b. for pFET: in-situ boron doped Silicon Germanium (SiGe) or Si (Same epitaxy merges fins in resistor region)

1


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Figure 3: Proces...