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Area-Efficient Squaring Circuit with Unsigned and Signed Options

IP.com Disclosure Number: IPCOM000241608D
Publication Date: 2015-May-15
Document File: 5 page(s) / 88K

Publishing Venue

The IP.com Prior Art Database

Abstract

An area-efficient squaring circuit is proposed with unsigned and signed options. There are three components of the squaring circuit. First, a partial product generation block is designed to generate the partial products. Second, the compression block compresses the number of the partial products to two in parallel. Third, the final addition block adds the two partial products and generates the final product for the squaring circuit.

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Area-Efficient Squaring Circuit with Unsigned and Signed Options

ABSTRACT

      An area-efficient squaring circuit is proposed with unsigned and signed options. There are three components of the squaring circuit. First, a partial product generation block is designed to generate the partial products. Second, the compression block compresses the number of the partial products to two in parallel. Third, the final addition block adds the two partial products and generates the final product for the squaring circuit.

1.       INTRODCUTION AND MOTIVATION

      Squaring circuits are widely used in the applications such as microcontrollers, DSP and media processing. So far, there are two types of number representations (unsigned and 2’s complement signed) used for squaring circuits, depending on the meaning of the corresponding variables. The reason and benefit behind is that, for a n-bit variable, if it represents an unsigned number, it ranges from 0 to ; while it has a range of  when representing a 2’s complement signed number, which indicates that unsigned representation has a bigger range of positive value. Therefore, it’s beneficial to enable both unsigned and signed squaring operations for a squaring circuit so that for some input cases, if it’s certain that the input to the squaring circuit is non-negative, the users would choose the unsigned representation because it has a larger range for a positive number. Otherwise, the signed representation should be selected to represent negative numbers.

      To enable both unsigned and signed squaring operations, an area-efficient squaring circuit with unsigned and signed options is needed, instead of one unsigned squaring circuit and one signed squaring circuit implemented separately on the same chip. To design a squaring circuit with both unsigned and signed options, an area-efficient partial product generation scheme is needed to generate the partial products for the squaring circuit. Besides, a specific and efficient compression scheme needs to be come up to compress the number of partial products to two for final addition, and a design of final adder is needed to generate the final product.

2.       PROPOSED AREA-EFFICIENT SQUARING CIRCUIT

The proposed squaring circuit with unsigned and signed options are composed of three blocks – partial product generation block, compression block and final addition block, shown in Fig. 1, where A is an n-bit input and P is a 2n-bit product. The mode signal is used to select between unsigned option and signed option. If mode = 0, the squaring circuit is for unsigned operation with both A and P unsigned. Otherwise, the squaring circuit conducts signed squaring operation and both A and P are 2’s complement signed numbers. The partial product generation block is used to generate the partial products, which are compressed to two 2n-bit partial products by the compression block. Finally, the final addition block adds the two partial products and gener...