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High Speed and Balanced Skew Level Shifter for Low Power Design

IP.com Disclosure Number: IPCOM000241662D
Publication Date: 2015-May-20
Document File: 4 page(s) / 260K

Publishing Venue

The IP.com Prior Art Database

Abstract

Level shifters are widely used in SOCs. High speed and balanced skew are more and more important to some data conversion designs. Support for POR and ISO and back-bias mode benefit low power designs. In this paper we propose a general level shifter that addresses these factors.

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High Speed and Balanced Skew Level Shifter for Low Power Design

Abstract

Level shifters are widely used in SOCs.  High speed and balanced skew are more and more important to some data conversion designs. Support for POR and ISO and back-bias mode benefit low power designs. In this paper we propose a general level shifter that addresses these factors.

Introduction

Figure 1 shows one general balanced skew level shift structure. We can find this structure just general level shift plus general SR, SR general using case on balance clock skew. Function level, just special application level shift, can’t be used as generalist level shift by analog module. While core power down (VDDL close to ground) device 116 and 117 turn off, SR will work in unstable state, output “1” or toggle, such behavior sometimes should be forbid. output “1” even fail the SOC normal function.  In addition, can’t support POR and ISO and Back bias mode, don’t suit to low power SOC design.

 
 

Figure1. General balance skew level shift structure

 
 

Our proposed method support POR and ISO and back bias mode, those solutions benefit for low power design. Speed boost solution and loading/path balance be imported. As a result, generalist high speed and balance skew level shift benefit for low power design.

Design and Implementation

Figure 2 shows the implementation of our proposed method.

  1. The important components of our method are green dashed box “D” and “E” and “F”. Though “A”  and “B” and “C” and “G” important to performance , as general solution  not proposed design key .    
  2. Green dashed box “A”  and “B” and “C” calibrate the signal path...