Browse Prior Art Database

ADC Channel Mux Test Method With GPIO

IP.com Disclosure Number: IPCOM000241842D
Publication Date: 2015-Jun-03
Document File: 4 page(s) / 156K

Publishing Venue

The IP.com Prior Art Database

Abstract

This paper introduces a method of ADC Channel Mux Test with general purpose IO. The ADC analog signals to the channel mux come from IO pull up or pull down or digital output function. The proposed test method does not require external equipment and may be performed during probe test.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

ADC Channel Mux Test Method With GPIO

Abstract

This paper introduces a method of ADC Channel Mux Test with general purpose IO.  The ADC analog signals to the channel mux come from IO pull up or pull down or digital output function.  The proposed test method does not require external equipment and may be performed during probe test. 

Introduction

ADC channel Mux test must detect the defects on ADC input channels and defects on the mu decode logic, usually need external tester (analog input signal generator and connection wires to all ADC channels), which requires a long settle time if the device has many ADC channels, it is very timing consuming.  The proposed method provides a simple and low cost way to do the channel mux test and doesn’t depend on external resources.

According to quality requirements, the ADC input channel mux test needs at least 2~3 analog level (VRH/VRL, and at least one point that is 2*Vt away from the VRH/VRL end points).                                   

SOC cost reduction is a common goal. SOC test cost will be reduced if ADC mux channel test can be one without any test equipment. Finally it can be added to probe test and improve defect coverage. It will have big benefit for die sales.

Design and Implementation

The method introduced in this paper has four important coupled components as illustrated in Figure 1.

1.      ADC module:  analog-to-digital converter analog and control; provide channel selection outputs and receive analog inputs from different channels.

2.      RGPIOC module:  port control logic to provide GPIO pull up or pull down or input/output functions.

3.      Padring:  Include GPIO pads to input/output analog and digitals through pads.

4.      ADC analog mux:  analog multiplexer from multi pads to one ADC analog input.

                                                                                                 Figure 1 Test System Diagram

Normally ADC mux test needs input analog voltage from package pins.  In our method, we do some changes on GPIO_PAD and this voltage can be provided by the chip internally.  Figures 2 - 4 show the GPIO structure to implemen...