Browse Prior Art Database

Implementing DDR4 and DDR3/3L Validation Methodology on one Printed Circuit Board

IP.com Disclosure Number: IPCOM000241888D
Publication Date: 2015-Jun-05
Document File: 3 page(s) / 89K

Publishing Venue

The IP.com Prior Art Database

Abstract

Nowadays, lots of DDR controllers are supporting DDR3/3L and DDR4 memory buses through the common IP and physical interface. On board, designers can mount DDR3/3L or DDR4 memory components or can use DDR3/3L or DDR4 DIMM. DDR4 uDIMM contains 288 pins and DDR3/3L uDIMM contains 240 pins. For a platform that supports both DDR3/3L and DDR4 interfaces on a common memory bus, a board cannot have both DDR4 and DDR3/3L DIMM connectors mounted side by side as it affects signal integrity and limits the speed of operation. DDR4 is the latest technology having greater bandwidth and speed offerings as compared to DDR3/3L whereas DDR3/3L memories are cheaper. Customers may need both these interfaces and hence have to design separate boards to support DDR3/3L and DDR4 memory interfaces. This leads to increased cost and time to market. So far a common board design specification has not been created for DDR3/3L and DDR4 interfaces. This document provides a solution to the above mentioned problem by facilitating a generic DDR4 to DDR3/3L adapter card that can be used on a DDR4 DIMM based system to validate both DDR4 and DDR3/3L interfaces. This approach is applicable for all types of DDR4 and DDR3/3L DIMMs.

This text was extracted from a Microsoft Word document.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 52% of the total text.

Implementing DDR4 and DDR3/3L Validation Methodology on one Printed Circuit Board

Abstract:

Nowadays, lots of DDR controllers are supporting DDR3/3L and DDR4 memory buses through the common IP and physical interface. On board, designers can mount DDR3/3L or DDR4 memory components or can use DDR3/3L or DDR4 DIMM. DDR4 uDIMM contains 288 pins and DDR3/3L uDIMM contains 240 pins. For a platform that supports both DDR3/3L and DDR4 interfaces on a common memory bus, a board cannot have both DDR4 and DDR3/3L DIMM connectors mounted side by side as it affects signal integrity and limits the speed of operation. DDR4 is the latest technology having greater bandwidth and speed offerings as compared to DDR3/3L whereas DDR3/3L memories are cheaper. Customers may need both these interfaces and hence have to design separate boards to support DDR3/3L and DDR4 memory interfaces. This leads to increased cost and time to market.  So far a common board design specification has not been created for DDR3/3L and DDR4 interfaces. This document provides a solution to the above mentioned problem by facilitating a generic DDR4 to DDR3/3L adapter card that can be used on a DDR4 DIMM based system to validate both DDR4 and DDR3/3L interfaces. This approach is applicable for all types of DDR4 and DDR3/3L DIMMs.

Description:

This approach presents a new aspect of DDR3/3L/4 validation using a single board designed for DDR4 DIMM interface and DDR3/3L interface is supported as well by using an “DDR4 to DD...