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CAPACITOR VOLTAGE CONTROL TECHNIQUE FOR A MODULAR CONVERTER

IP.com Disclosure Number: IPCOM000241946D
Publication Date: 2015-Jun-10
Document File: 6 page(s) / 220K

Publishing Venue

The IP.com Prior Art Database

Abstract

The disclosure proposes a capacitor voltage control technique using a hysteresis voltage control. The technique limits a capacitor voltage within a hysteresis band by using hysteresis band control for each module in an arm. When the capacitor voltage hits a lower limit of the hysteresis band, the capacitor gets charged in a subsequent control period and the capacitor voltage increases. When the capacitor voltage hits an upper limit of the hysteresis band, the capacitor gets discharged in the subsequent control period and the capacitor voltage decreases.

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CAPACITOR VOLTAGE CONTROL TECHNIQUE FOR A MODULAR CONVERTER

BACKGROUND

The present invention relates generally to power systems, and more particularly to a capacitor voltage control technique for a modular converter.

There exist various conventional techniques for voltage balancing.  The voltage balancing among power module capacitors is one of the main problems in a modular multilevel converter (MMC) and a modular embedded multi-level (MEMC).

Figure 1A

Figure 1B

One conventional technique discloses balancing of a control loop.  Referring to Figure 1A and 1B, each module has an individual carrier wave with a phase shift of 2p/(pN), in which p is the carrier ratio and N is the number of modules in a phase leg.  The switching frequency is fixed for each module, and p is preferred to be 3<p<4.  Further, referring to Figure 1B, the modulation wave comprises two components. A first component is an arm voltage command and a second component is a voltage to keep each module voltage balanced within the arm. 

 

Figure 2

Referring to Figure 2, another conventional technique discloses a sorting algorithm-based capacitor voltage balancing.  A selection mechanism is used to determine which individual module is inserted or bypassed when the number of devices is changed within an arm.  The selection is made depending on the direction of the arm current (or phase current) and a comparison of the DC voltages in the congregation of modules in each arm.  As a result, modules with the highest and lowest voltages are identified.  The sorting algorithm switches on the capacitors with the lowest voltages, when the current flow is positive and vice versa for negative current.  As a result, the conventional techniques are unable to efficiently balance capacitor voltage among each module.  Further, the conventional techniques offer poor conversion efficiency.

It would be desirable to have a capacitor voltage control technique for a modular converter.

BRIEF DESCRIPTION OF DRAWINGS

Figure 1A is a circuit diagram according to a conventional technique.

Figure 1B is a graph showing a modulation wave according to the conventional technique.

Figure 2 is a circuit diagram of another conventional technique for capacitor voltage balancing.

  

Figure 3 is a hysteresis curve according to an embodiment of the present invention.

Figure 4 depicts a circuit for an arm according to an embodiment of the present invention.

Figure 5 depicts a flow diagram of a control algorithm according to an embodiment of the present invention.

DETAILED DESCRIPTION

A capacitor voltage control technique using a hysteresis voltage control is disclosed.  The hysteresis voltage control regulates the switching frequency of a module. 

Figure 3 is a hysteresis curve according to an embodiment of the present invention.

Figure 3

The capacitor voltage control technique limits capacitor voltage within a hysteresis band (see Figure 3) by using hysteresis band control for each module in an arm (see...