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Method and System for Reducing or Eliminating Backup Requirements for Flash Controller Metadata and De-staging Buffers

IP.com Disclosure Number: IPCOM000242151D
Publication Date: 2015-Jun-19
Document File: 1 page(s) / 35K

Publishing Venue

The IP.com Prior Art Database

Abstract

A method and system is disclosed for reducing or eliminating backup requirements for flash controller metadata and de-staging buffers.

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Method and System for Reducing or Eliminating Backup Requirements for Flash Controller Metadata and De-staging Buffers

Current flash memory controllers utilize volatile memory such as Dynamic Random Access Memory (DRAM) or Static Random-Access Memory (SRAM) to store logical-to-physical address mapping information. Even for Peripheral Component Interconnect (PCI) based flash cards, a volatile server or workstation DRAM memory is used to maintain the mapping information for the server or workstation in which a flash card is installed. The volatile memory is also frequently used to queue write data before the data is unloaded or "de-staged" to flash. The use of the volatile memory for the write data requires a strategy for backing up the write data quickly and reliably in the event of a power loss. Often, batteries or very large capacitors (super-capacitors) are employed to provide power for the duration of the backup operation. The power provision during the backup operation adds cost, consumes space, and adds undesired complexity to designs.

Disclosed is a method and system for reducing or eliminating backup requirements for flash controller metadata and de-staging buffers. The method and system utilizes nonvolatile memory to provide functions typically served by a volatile storage for a flash controller. The nonvolatile memory can include the newly emerging types such as, but not limited to, Phase Change Memory (PCM) and Magneto-resistive Random Access Memory (M...