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Configurable Single Transceiver Circuit for USB and UART

IP.com Disclosure Number: IPCOM000242560D
Publication Date: 2015-Jul-24
Document File: 3 page(s) / 242K

Publishing Venue

The IP.com Prior Art Database

Abstract

A circuit is introduced providing support for Universal Serial Bus (USB) or Universal Asynchronous Receiver/Transmitter (UART). It uses single transceiver circuitry under control of selection signals.

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Configurable Single Transceiver Circuit for USB and UART

Abstract

A circuit is introduced providing support for Universal Serial Bus (USB) or Universal Asynchronous Receiver/Transmitter (UART). It uses single transceiver circuitry under control of selection signals.

Introduction

For a low pin count system on chip (SOC), it is important to share pins between different functional modules.  It’s known that USB ports can be shared with other functional ports. From circuit design point of view, it is beneficial that the USB transceiver circuit can be shared with other functional modules. A configurable single transceiver circuit is introduced below to make the dedicated USB transceiver circuitry can be shared with UART function. And the UART SO/SI channel is selectable in this circuitry.

Design and Implementation

The circuit implementation is based on traditional USB transceiver circuitry; two new control signals are introduced to control the working mode of the transceiver circuitry. The first control signal “ipp_mode_sel” controls the working mode of the transceiver circuitry, when it is logic high, the transceiver circuitry will be configured to work in the normal USB mode, both USB_DP and USB_DM as normal USB signals. When it is logic low, the transceiver circuitry will be configured to work in the UART mode, the second control signal “ipp_ch_sel” controls the signal output (SO/TX) channel in the UART mode, when it is logic high, the USB_DM will be UART SO/TX and USB_DP will be the SI/RX; when it is logic low, the USB_DP will be UART SO/TX and USB_DM will be UART SI/RX. When signal “ipp_mode_sel” is logic high, there is no impact to the circuit function whatever the logic level is of the signal “ipp_ch_sel”.

The table 1 shows the function table of the circuitry under the control of signal “ipp_mode_sel” and “ipp_ch_sel”.

Table 1: Function Table of the Circuit

ipp_mode_sel

ipp_ch_sel

Mode of operation...