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Safety Complaint, Self-Detecting and Correcting Triple Voting Flip-Flop

IP.com Disclosure Number: IPCOM000242561D
Publication Date: 2015-Jul-24
Document File: 6 page(s) / 738K

Publishing Venue

The IP.com Prior Art Database

Abstract

Semiconductor technology scaling continues to deliver faster and smaller transistors, resulting in continuous improvements in overall system performance. However, as transistors shrink, the amount of charge required to change the logic state of a memory elements like flip-flop, latches and SRAM/DRAM cells also shrinks, reducing the device immunity against logical upsets due to high energy particle strikes (radiation). The faults arising due to these particle strikes are often termed as soft errors or Single Event Upsets (SEUs). Additionally, as the technology scales down physical faults tend to increase exponentially as lithographic errors, interconnect opens/shorts and other process related challenges heavily compromise the quality of fabricated product. While device level redundancy is very effective in mitigating SEUs, the existing systems are not designed to deal with issues related to manufacturing faults. This turns out to be a great concern for VLSI designers especially for high end safety and security applications as in spite of paying the overhead for additional redundant devices failures due to manufacturing faults may still lead towards a faulty device. In order to cater the need for a manufacturing aware fault tolerant design, this paper presents a self-correcting triple voting flip-flop circuit that is not only able to detect and correct SEU faults but provides corrective actions for manufacturing defects a well.

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Safety Complaint, Self-Detecting and Correcting Triple Voting Flip-Flop

1.      Introduction

Semiconductor technology scaling continues to deliver faster and smaller transistors, resulting in continuous improvements in overall system performance. However, as transistors shrink, the amount of charge required to change the logic state of a memory elements like flip-flop, latches and SRAM/DRAM cells also shrinks, reducing the device immunity against logical upsets due to high energy particle strikes (radiation). The faults arising due to these particle strikes are often termed as soft errors or Single Event Upsets (SEUs). Additionally, as the technology scales down physical faults tend to increase exponentially as lithographic errors, interconnect opens/shorts and other process related challenges heavily compromise the quality of fabricated product. While device level redundancy is very effective in mitigating SEUs, the existing systems are not designed to deal with issues related to manufacturing faults. This turns out to be a great concern for VLSI designers especially for high end safety and security applications as in spite of paying the overhead for additional redundant devices failures due to manufacturing faults may still lead towards a faulty device. In order to cater the need for a manufacturing aware fault tolerant design, this paper presents a self-correcting triple voting flip-flop circuit that is not only able to detect and correct SEU faults but provides corrective actions for manufacturing defects a well.    

2.      Motivation

This paper is an effort to develop a robust safety complaint, self-error detecting and correcting architecture for triple (or more) redundancy voting based flip-flops that protects against SEUs as well manufacturing defects in the interconnect portion of the system. Additionally, the proposed architecture also resolves the detection and correction limitations of conventional circuits for failures occurring due to multiple SEUs occurring progressively i.e., one SEU followed by another.  

3.      Conventional Circuits

The following are the conventional circuits used for SEU tolerant triple modular redundancy. There may be other designs available but functionally these two cover all other variants.

a)       Triple Redundant Fault-Tolerant Register

Figure 1 shows a conventional master and slave flip-flop as a base circuit and inserts replicated redundant slave stages as a source for triple voting. The output of each slave is sent to a majority voting circuit which sends the “correct” majority output back to the slave stages. If the select lines of the MUXs shown below (22’ & 24’) go high, input B is selected while the low value selects A. The feedback signal to each slave MUX is thus a majority voted output through the voting circuit instead of a direct slave MUX output being fed back. This mechanism provides a triple modular redundancy inside the slave stage and hence protects in case of SEUs. It should be noted he...