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Thermally Enhanced Package-on-Package (PoP) Structure Using Carbon Nanotube Fiber Core

IP.com Disclosure Number: IPCOM000242809D
Publication Date: 2015-Aug-19
Document File: 4 page(s) / 266K

Publishing Venue

The IP.com Prior Art Database

Abstract

In stacked package or “Package on Package” (PoP) semiconductor package configurations, a major limitation exists in the ability to dissipate heat from the bottom device due to the inability to use heatsinking or convective cooling on the bottom device. Another problem is that excessive heat from the bottom device will cause the top device to heat up. This paper describes a package substrate structure where the typical glass fiber weave core is replaced by a carbon nanotube fabric. The carbon nanotubes are electrically conductive, so an insulator is used for electrical through vias, while metal thermal vias and VSS (ground) vias are allowed to contact the carbon nanotube core. The high thermal conductivity of the core enables heat transfer towards the edges of the package, away from the silicon of the top package. Metal vias can then be placed at the perimeter of both the top and bottom packages in the stack to facilitate heat transfer to the top or bottom surfaces. In one configuration, up to 19% reduction in die temperature can be achieved when a carbon nanotube core is substituted for a glass core.

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Thermally Enhanced Package-on-Package (PoP) Structure Using Carbon Nanotube Fiber Core

Abstract

In stacked package or “Package on Package” (PoP) semiconductor package configurations, a major limitation exists in the ability to dissipate heat from the bottom device due to the inability to use heatsinking or convective cooling on the bottom device.  Another problem is that excessive heat from the bottom device will cause the top device to heat up.  This paper describes a package substrate structure where the typical glass fiber weave core is replaced by a carbon nanotube fabric.  The carbon nanotubes are electrically conductive, so an insulator is used for electrical through vias, while metal thermal vias and VSS (ground) vias are allowed to contact the carbon nanotube core.  The high thermal conductivity of the core enables heat transfer towards the edges of the package, away from the silicon of the top package.  Metal vias can then be placed at the perimeter of both the top and bottom packages in the stack to facilitate heat transfer to the top or bottom surfaces.  In one configuration, up to 19% reduction in die temperature can be achieved when a carbon nanotube core is substituted for a glass core.

Background

Across the semiconductor industry, a major impediment to stacking memory on top of a microprocessor chip or package is concern regarding the heat generated by the microprocessor, and the limited high-temperature operation capability of many memory devices – especially DRAM (Dynamic Random Access Memory).  The microprocessor will almost always need to go on the “bottom” due to the need to have an efficient power supply feed to the device core.    In stacked package or “Package on Package” (PoP) semiconductor package configurations, a major limitation exists in the ability to dissipate heat from the bottom device due to the inability to use heatsinking or convective cooling on the bottom device (Figure1). 

Figure 1.  Conventional Package on Package Cooling Solution

With an in-plane thermal conductivity1 many times higher than that of glass or traditional carbon fibers used in semiconductor package construction, carbon nanotube fiber technology is an attractive material for lateral heat conduction in semiconductor packages.  This paper describes a nove...