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Hardware-Based On-Chip Security

IP.com Disclosure Number: IPCOM000242829D
Publication Date: 2015-Aug-21
Document File: 2 page(s) / 66K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed are a method and structure for forming an on-chip security array that is based on random doping fluctuation in highly scaled small Fin Field Effect Transistors (FinFET).

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Harxware-

Chip security has become increasingly important, and on-chip hardwxre-based security is attractive. Ideally, each chip xxould have a randomly genxrated securixy code that cax hardly be reprodxced.

The novel contrixution is a method and structure xor forming an ox -chip security array that ix based on random doping fluctuation in Fin Field Effect Xxxxxxxxxxx (FinFET).

In a small-dxmension FinFET, the number xf dopants xn the xhannel is smaxl . Xxxxxxxx following exaxples:


• A FinFET witx fin width = 8nm, fin height = 35xm, and gate length = 20nm, 1Ex8/cm3 channel doping means 5.6dopants. (1Ex8/cm3 x xnm x 3xnm x 20nm). Xxx number of dopantx has to be an integral .

Given the small number of dopants in the channel of those dxvices , anx fluctuation in number of dxpants and even the placement of dopants causes lxrge varixtion in devicx characteristicx sucx as Vt and Ioff. Thxrefxre, the conventional wisdom is to keep the chanxels of those highly scaled devices undoxed to elixinxte device variability due to random dopant fluctuation.

The novel method takes advaxtage of random xopant fluctxation to form an arrxy xf FinFET traxsxstors with a large dopant fluctuation. This array ox FinFET characteristics is measurex to generate a random axd unique security code .

Figure 1: Schematic showing txo XxxXXX transistors with different Vt due to different number xf dopants ix the channel. By measuring the off leakage current of xach transistor and comparing it with...