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Package Alignment Features for Testing Fine Pitch Land Grid Array LGA packages

IP.com Disclosure Number: IPCOM000243648D
Publication Date: 2015-Oct-07
Document File: 3 page(s) / 143K

Publishing Venue

The IP.com Prior Art Database

Abstract

A structure is described in which tooling holes are integrated into the mold cap of a semiconductor package These tooling holes reduce locating tolerances and allow for a more robust electrical test by enabling tighter locating of test contact pins to package pads The method of creating the tolling holes is also described The tooling holes are created without addition of process steps to the standard packaging flow

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Package Alignment Features for Testing Fine Pitch Land Grid Array (LGA) packages

Abstract

A structure is described in which tooling holes are integrated into the mold cap of a semiconductor package.  These tooling holes reduce locating tolerances and allow for a more robust electrical test by enabling tighter locating of test contact pins to package pads.  The method of creating the tolling holes is also described.  The tooling holes are created without addition of process steps to the standard packaging flow.

Background

Packaged semiconductor molded Land Grid Array (LGA) and Quad Flatpack No-lead (QFN) devices almost always receive some kind of automated electrical test prior to integration into a system.  The mechanical configuration of this test consists of a fixture which holds the part and a socket with pins that contact the package pads.  As package geometries, pad sizes and pad spacing get smaller, it becomes increasingly difficult to repeatedly make good electrical contact with the package pads due to package tolerances.  One of the largest contributors to package tolerance is the package singulation or saw process, since fixture that holds the part during electrical test references the package edge.  This paper describes a structure in which tooling holes are integrated into the mold cap of the semiconductor package.  These tooling holes reduce locating tolerances and allow for a more robust testing process. 

Figure 1.  Current Method Compared to New Metho...