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Localized Metal Stack Ceiling Assignment towards Wiring Congestion Mitigation

IP.com Disclosure Number: IPCOM000243802D
Publication Date: 2015-Oct-17
Document File: 5 page(s) / 115K

Publishing Venue

The IP.com Prior Art Database


Abstract The feature size of the transistor is shrinking but, the routing tracks and pitches are not shrinking at the same scale as the feature size of transistors. As a result the number of tracks available to route per bay is reduced which in turn is increases the complexity of attaining routing closure on designs. Getting the most optimal routing contract for the design closure still remains a non-trivial problem to solve, as it is heavily dependent on the coordination between parent unit and the child design. Often it is observed that there are several unused tracks or regions in parent where the child requires the tracks or vice versa. The proposed method solves this problem by uplifting the ceiling of the child design to the required layer and then cutting out regions which are required by the design, and giving back the rest to the parent, taking into account all the regions which are blocked by the parent. This method improves routing contract management without much manual intervention, and leads to faster routing closer.

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Localized Metal Stack Ceiling Assignment towards Wiring Congestion Mitigation


 As technology advances routing in the congestion dominated regions of a macro is proving to be a challenge. A blanket allocation (uniform) of wiring resources can cause major stress on a range of metal plane, specifically if parent hierarchy in same region is experiencing congestion and child is not making full use of it or vice-versa. There are cases where local congestion within the macro is reported and where it is found that the problem can not be resolved fully without giving extra wiring resource in the affected region. Uniformly allocating more wiring resources is very costly. This idea explores the possibility of modification of the macro ceiling only in those regions experiencing local congestion, in effect to provide additional wiring resources.

     Higher metal planes are used for long distance routing at the top level. It is also known that, higher metal planes have greater width hence the number of tracks available is lesser. With wiring resources being limited at higher layers, it is important to allocate and utilize them judiciously. Therefore, when the ceiling of the macro is modified in effect to provide more wiring resources, only in the areas of local congestion within the macro, it appears to be an efficient means to help in solving the congestion within the macro.

Overall Methodology Flowchart


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              Assuming that the best placement option has been used, a round of synthesis is done and ceiling is uniform over the macro, if there is congestion on the current macro ceiling, those hot spot regions are identified. Parent level hierarchy or integration level may also mention where additional wiring resources cannot be provided to the macro ( i.e those regions which cannot be used for modifying the ceiling of the macro).

    Using both the above information, the regions where the macro ceiling is required and permitted to be increased is identified. New abstracts with regions having higher metal ceiling is identified and created so that it can be used during the routing. The congestion in the regions which have a higher ceiling is expected to show lower congestion as additional routing resources were provided to the macro.

Detailed Description

The means by which the regions and the layers required for a new macro ceiling is identified and created is described below with the help of figures.


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     In figure 1, the hot spot regions on the macro ceiling (MC) and one level below the macro ceiling (MC-1) are identified and marked as CG1 and CG2.

     If the co...