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Method for non intrusive mailbox system for the verification of an ARM A9 microprocessor system

IP.com Disclosure Number: IPCOM000244042D
Publication Date: 2015-Nov-09
Document File: 9 page(s) / 72K

Publishing Venue

The IP.com Prior Art Database

Abstract

This disclosure describes a method for non intrusive mailbox system for the verification of an ARM A9 microprocessor system

This text was extracted from a Microsoft PowerPoint presentation.
This is the abbreviated version, containing approximately 74% of the total text.

Slide 1 of 9

Method for non-intrusive mailbox system for the verification of an ARM-A9 microprocessor system


Slide 2 of 9

Mailbox system

In a test environment that includes a microprocessor, it is significantly faster, more versatile and efficient to use the processor to manage the test environment.

In order to send commands from the processor to the test environment, there needs to be added functionality to the system, which is often called a “Mailbox”.

Mailbox is responsible for receiving commands from the processor and configuring the verification IPs used in the test environment.


Slide 3 of 9

Typical Test environment with a processor

The DUT is stimulated using the VIPs.

It is desirable to control the VIPs using the processor itself.

Test Environment

DUT

Processor

Memory

VIP

Interconnect

Peripheral

Peripheral

VIP

VIP


Slide 4 of 9

Mailbox System

The mailbox receives commands from the processor through the interconnect.

Mailbox configures the VIPs based on the processor commands

Test Environment

DUT

Processor

Memory

VIP

DUT

Mailbox

Interconnect

Peripheral

Peripheral

VIP

VIP


Slide 5 of 9

Intrusive Mailbox System

In this scheme the mailbox system has three main issues:

the inclusion of the mailbox modifies the DUT, as it requires an extra port to the interconnect to be connected to the processor.

In addition, traffic to the mailbox goes through the interconnect, changing the traffic pattern of the DUT.

Test Environment

DUT

Processor

Memory

VIP

 

traffic

DUT

Mailbox

Interconnect

Peripheral

Peripheral

VIP

VIP


Slide 6 of 9

Intrusive Mailbox System

In order for the processor to read status data back from the mailbox, it needs to constantly poll the mailbox address, leading to unnecessary traffic and delays.

Test Environment

DUT

Processor

Memory

VIP

 

traffic

DUT

Mailbox

Interconnect

Peripheral

Peripheral

VIP

VIP


Slide 7 of 9

Non-Intrusive Mailbox System for ARM A9 Core

In the proposed non-intrusive scheme, a reserved address of the ARM A9 microarchitecture is used to send mailbox commands.

Processor sends mailbox commands to the reserved address which are discarded by the processor Snoop-Control-Unit (SCU) before they even reach the interconnect.

According to the “Cortex-A9 MPCore Technical Reference Manual” peripheral address 0x300-0x3FF are reserved and unused, which can be used in this the mailbox system scheme.

The mailbox constantly monitors the link between the A9 core and SCU and hijacks any transaction sent to the mailbox address.

  Write transactions: Mailbox only needs to hi...