Browse Prior Art Database

Hardware Debugging with Dynamic Binding of Software Elements

IP.com Disclosure Number: IPCOM000244527D
Publication Date: 2015-Dec-18
Document File: 3 page(s) / 68K

Publishing Venue

The IP.com Prior Art Database

Abstract

Hardware Debugging deals with finding root cause of functional bugs found in hardware design. The key idea of this publication is the proposed method to calculate a verification constraint or condition based on Design under Verification (DUV) and the particular functional bug to be debugged; using software GUI elements like combo boxes, text edit etc. These software elements could be used as place holder of design or other inputs and also could be dynamically correlated based on DUV + bug we are considering.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 52% of the total text.

Page 01 of 3

Hardware Debugging with Dynamic Binding of Software Elements

Introduction

    Functional verification of hardware design written in any HDL (Hardware Description Language) ensures that the design is functionally correct. The software technique used for this purpose is called simulation which find bugs in hardware design. Hardware debugging deals with finding or analyze the root cause of the bug using simulation trace data. The traditional techniques of debugger tool is wave form validation, logic analysis, source HDL annotation.

Not very much obvious, but design / verification condition could be calculated using multilevel waveform or creating complex wave etc. This is not only an inefficient when compared to dynamic evaluation of clause; but also limited to its use in current simulation cycle where user is calculating the multilevel waveform. For e.g. if we create a waveform X = A & B | C @ cycle C1 then we can see X as waveform but we may sometime require to use values of X @ cycle C1 in determining another clause Y @ cycle C2.

The proposal is about determination of verification condition (or clause) relevant for bug under debugging w.r.t DUV more easily using entities belonging to software world. These entities termed as software elements (s/w). Examples for input field s/w elements could be like combo box, text edit, and check box. And the same for output fields like text edit box, combo drop down etc. Idea is to create & map these software elements based on DUV+Bug for the evaluation of verification clause. A set of software programs / routines like C-functions / Tcl API which would be finally evaluate the debug condition as being part of a debug GUI interface; considering inputs associated from mapped input software elements and populating the results into output software elements, if needed.

Description

The basic flowchart below shows idea of implementing the concept introduced above in the disclosure, "dynamic-binding-software-elements " in the context of " evaluation of h/w debugging condition "

1


Pag...