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Method to hotplug redundant clock flex cable

IP.com Disclosure Number: IPCOM000244674D
Publication Date: 2016-Jan-06
Document File: 3 page(s) / 80K

Publishing Venue

The IP.com Prior Art Database

Abstract

Method to hotplug redundant clock flex cable

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Page 01 of 3

Method to hotplug redundant clock flex cable


Server systems generally have many field replaceable units (FRUs). In the case of hardware failures on such FRUs, server firmware code generates an error log. A service call is made to replace hardware associated with that FRU. Enterprise class servers typically have a redundant system clock - two clock FRUs. The clock FRU typically has an oscillator chip and a feedback chip. Each of the two clocks are connected to the Nodes of the server via Flex cables. While the system is up and running, a problem with primary clock's cable will cause a switch-over to the redundant secondary clock, and the system will still be up. Typical methods to replace this bad cable would require bringing down the system to a standby state, replacing the cable, and then booting up the system again. Same is the case if a cable problem occurs with the redundant clock while the system is up.

So in a nutshell, the problem that needs to be solved is that the secondary clock cable can't be hot-plugged at server runtime. We set out to solve these issues with the goal of removing the burden of bringing the system down. Having the ability to do that would have two advantages - not having to bring the system down for cable replacement and better reliability of the redundant clocks.

When a redundant clock system is at runtime, a problem with the cables connected to the redundant clock would mean loss of clock redundancy - there is one primary clock serving the system, if that fails the server will terminate. A cable problem could be due to something as simple as unplugged ends, but they could even surface due to various faults in the connecting cables, such as bent pins, connector issues, electrostatic discharge, etc.

It is important to note that although the clock is actually good, and the problem is with the cable alone, server firmware design would require changes to ensure that hot-plugging a good cable will cause the redundant clock to be re-considered as a good source..

The figure below depicts the connection of the system clocks to the clock targets (which would be the processors, memory units, etc on the Node). ClockDomain is the oscillator chip and OscControl is the feedback chip.

1


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Figure 1
Clock connection to Node - two clock cards each of which can act as the primary clock source for the system. ClockDomain sends clock signals . OscControl monitors clock signals ,

For the purpose of this disclosure, we are interested in the OscControl shown in Figure 1. This is a chip on the clock card that receives feedback signals from clock targets such as processors, These signals tell the clock card about the view that the clock targets see - i.e which clock(s) do they see signals from.

Here is a table describing these feedback signals.

CLOCK0 FEEDBACK CLOCK1 FEEDBACK MEANING ON PRIMARY CARD

  MEANING ON SECONDARY CARD

0

0

NO CLOCK

NO CLOCK

1

1

Default state - primary active and secondary is redundant

Default s...