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Method of Enhancing Cryptosystem against Side Channel Attack

IP.com Disclosure Number: IPCOM000244738D
Publication Date: 2016-Jan-06
Document File: 3 page(s) / 57K

Publishing Venue

The IP.com Prior Art Database

Abstract

Security is becoming more and more important in Internet of Things (IoT) and other fields. Side channel attack is a very effective way to break cryptosystem. In this paper we present a method to enhance cryptosystems by dividing the system into multiple clock-domains and adding a random phase offset between the clocks. Compared to ways that randomly change the clock frequency of the cryptosystem, this method does not reduce cryptosystem performance.

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Method of Enhancing Cryptosystem against Side Channel Attack

Abstract

Security is becoming more and more important in Internet of Things (IoT) and other fields. Side channel attack is a very effective way to break cryptosystem.  In this paper we present a method to enhance cryptosystems by dividing the system into multiple clock-domains and adding a random phase offset between the clocks.  Compared to ways that randomly change the clock frequency of the cryptosystem, this method does not reduce cryptosystem performance.

Keywords: side channel attack (SCA), Security, AES(Advanced Encryption Standard)

Introduction

Side channel attack (SCA), as an effective way to break cryptosystem, is attracting more and more attention of cryptosystem designer. A variety of methods have been presented to defend against SCA.  Some ways like adding jitter to the cryptosystem clock or randomly masking some cycles will reduce cryptosystem performance significantly.  In this paper we present a method to enhance cryptosystem against SCA yet does not impact performance.

Description of the method

First, we divide the cryptosystem logic into multiple clock domains, block0 runs on clk0, block1 runs on clk1 and blockn runs on clkn.  Data transmissions between block0, block1 and blockn are synced by sync logic.

Then, a multi-clock with random phase offset generator is added to the cryptosystem. The frequencies of clk0, clk1 and clkn are different and the phase offsets between the clocks are randomiz...