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Efficient Retargetable Code Generation using Architecture Description based on Semantic Primitives in Retargetable Compilers Environment

IP.com Disclosure Number: IPCOM000245161D
Publication Date: 2016-Feb-15
Document File: 5 page(s) / 225K

Publishing Venue

The IP.com Prior Art Database

Abstract

This paper presents an efficient code generation technique that can be used in retargetable compilers environment. The technique is proposing the use of dynamic code generation based on the architecture model containing the instruction set description using semantic primitives. The technique consists in defining an orthogonal set of semantic primitives for each HLIR – LLIR pair, fully describe both HLIR and LLIR using these semantic primitives, build the code generation tree using semantic primitives (from HLIR) and then optimally cover it using LLIR tiles. The efficiency of the technique is assured by the fact that the tree pattern matching will automatically generate many-to-many covering of the generation tree with machine instructions in a single step, finding the most appropriate LLIR / machine instructions.

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Efficient Retargetable Code Generation using Architecture Description based on Semantic Primitives in Retargetable Compilers Environment

Abstract

This paper presents an efficient code generation technique that can be used in retargetable compilers environment. The technique is proposing the use of dynamic code generation based on the architecture model containing the instruction set description using semantic primitives. The technique consists in defining an orthogonal set of semantic primitives for each HLIR – LLIR pair, fully describe both HLIR and LLIR using these semantic primitives, build the code generation tree using semantic primitives (from HLIR) and then optimally cover it using LLIR tiles. The efficiency of the technique is assured by the fact that the tree pattern matching will automatically generate many-to-many covering of the generation tree with machine instructions in a single step, finding the most appropriate LLIR / machine instructions.

Introduction

This paper addresses the problem of efficient retargetable code generation using dynamic code generation based on instruction set architecture description. Most of the currently available and well known Code Generation techniques are based on the static description of the translation process from target independent intermediary representation of the code (high-level IR) to target dependent representation (low-level IR) – the static description is grouped in so called code generation rules. It is generally accepted that the code generation part of a retargetable compiler would require a longer time to retarget, since most of the rules are not model based and most of the times the code generation rules are hand-written.

Decreasing the time to retarget the code generation and increasing its efficiency by better covering the HLIR in a dynamic way is a good motivation for exploring new techniques for efficient code generation in retargetable compiler environment. The paper is proposing an efficient code generation technique that is using dynamic code generation based on the architecture model containing the instruction set description using semantic primitives.

Code Generation using Architecture Description based on Semantic Primitives

The proposed solution is focused on finding the most appropriate set of semantic primitives for the HLIR – LLIR pair the code generation is meant for. The technique consists in the following six steps and their integration in the general compiler flow is captured by Figure 1:

-          definition of the Orthogonal Set of Semantic Primitives – similar with a common denominator for the HLIR – target machine (LLIR) pair

-          description of the HLIR using the semantic primitives

-          description of the target instruction set architecture using the semantic primitives

-          build the code generation tree from HLIR tree – containing only semantic primitives

-          optimally cover the code generation tree with target instruction tiles (sub-trees)

-          generate code (targe...