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Sidewall Image Transfer Etch with Deep Trench Recess Method for the Formation of eDRAM FinFET Strap Structure

IP.com Disclosure Number: IPCOM000245300D
Publication Date: 2016-Feb-26
Document File: 2 page(s) / 60K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method and process to improve embedded Dynamic Random Access Memory (eDRAM) yield by fully eliminating silicon spikes at the source by isotropically removing said spikes during fin formation, but without attacking the silicon fins.

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Title

Sidewall Image Transfer Etch with Deep Trench Recess Method for the Formation of eDRAM FinFET Strap Structure

Abstract

Disclosed is a method and process to improve embedded Dynamic Random Access Memory (eDRAM) yield by fully eliminating silicon spikes at the source by isotropically removing said spikes during fin formation, but without attacking the silicon fins.

Problem

In dense embedded Dynamic Random Access Memory (eDRAM) arrays, the formation of the fin to eDRAM strap structure at the top of the capacitor is prone to leave residual silicon spikes around the perimeter of the trench, which nucleate epitaxial silicon and merge downstream.

Prior art addressed this problem with a process known as "poly fence removal". A more effective method is needed to address the silicon spike issue.

Solution/Novel Contribution

The novel contribution is a method and process to improve eDRAM yield by fully eliminating silicon spikes at the source by isotropically removing said spikes during fin formation, but without attacking the silicon fins. This insitu fin etch and deep trench recess process is more effective than the "poly fence removal" process for addressing the silicon spike issue and creates a more robust strap structure less prone to shorting

Method/Process

A modified sidewall image transfer fin creation process is proposed. The proposed process etches the entire hardmask stack and the Silicon on Insulator (SOI) without an intervening wet oxide strip. The preser...