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CMOS compatible HiK RMG Gate All Around performance FET formation

IP.com Disclosure Number: IPCOM000245578D
Publication Date: 2016-Mar-18
Document File: 2 page(s) / 63K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is novel integration flow, compatible with leading edge Complimentary Metal-Oxide Semiconductor (CMOS) finField Effect Transistor (finFET) integration, to make a high performance Gate All Around (GAA) structure on a Silicon on Insulator (SOI) substrate. By modifying the leading edge SOI finFET integration flow, the proposed solution provides a practical and easy method to make superior HiK RMG all-around FET structure, which provides better short channel effect (SCE) control and thus enables deeper FET scaling.

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Title

CMOS compatible HiK RMG Gate All Around performance FET formation

Abstract

Disclosed is novel integration flow, compatible with leading edge Complimentary Metal- Oxide Semiconductor (CMOS) finField Effect Transistor (finFET) integration, to make a high performance Gate All Around (GAA) structure on a Silicon on Insulator (SOI) substrate. By modifying the leading edge SOI finFET integration flow, the proposed solution provides a practical and easy method to make superior HiK RMG all-around FET structure, which provides better short channel effect (SCE) control and thus enables deeper FET scaling.

Problem

Fin Field Effect Transistor (finFET) technology has provided significant short channel effect (SCE) control over the conventional planer FET technology. However, finFET does not have good gate control over the fin bottom region, which leads to non-uniform FET characteristics (e.g., drain-induced barrier lowering (DIBL)/Vt, etc.) across the FET perimeter and thus device performance penalty. To address this finFET fundamental issue, Gate All Around (GAA) structure in general has superior FET characteristics. However, to make a GAA structure with a Complimentary Metal-Oxide Semiconductor (CMOS) compatible integration flow is a challenge.

A method is needed to produce a HiK Replacement Metal Gate (RMG) all- around FET with finFET CMOS compatible integration.

Solution/Novel Contribution

The solution is a novel integration flow, compatible with leading edge CMOS...