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High Accuracy, Low CPU Resource, Multiple Digital Channel Edge Capture Module with timestamp recording Implemented in FPGA

IP.com Disclosure Number: IPCOM000246851D
Publication Date: 2016-Jul-07
Document File: 4 page(s) / 85K

Publishing Venue

The IP.com Prior Art Database

Related People

Lilei Zhai: INVENTOR [+3]

Abstract

An embedded system is a computer system with a dedicated function within a larger mechanical or electrical system. Its electrical part is typically composed of a CPU with on-chip peripherals and electronic circuits on PCB boards. The program instructions written for embedded systems are referred to as firmware, which is executed by the CPU. It uses on-chip and on-board resources to provide varies of functionalities.

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Invention Title: High Accuracy, Low CPU Resource, Multiple Digital Channel Edge Capture Module with timestamp recording Implemented in FPGA for embedded systems

Principal Applications/Uses of the Invention

An embedded system is a computer system with a dedicated function within a larger mechanical or electrical system. Its electrical part is typically composed of a CPU with on-chip peripherals and electronic circuits on PCB boards. The program instructions written for embedded systems are referred to as firmware, which is executed by the CPU. It uses on-chip and on-board resources to provide varies of functionalities.

Figure 1 Block Diagram of the Electrical Part of an Embedded System

Digital signal edge capture module with timestamp recording is widely used in embedded systems. Its essential function is to record a timestamp when a rising or falling edge is detected from a digit input signal. Multiple digit input channel edge capture is usually required to provide timestamp records with the same time base. Timestamp values of different channels can be used in further calculation according to different scenarios.

This invention provide a new solution for this kind of module implemented in FPGA with high accurate timestamp but low CPU resource requirement.

Problem Overcome by the Invention

Existing digit signal edge capture modules are typically implemented in the firmware using on-chip peripherals, such as timer and edge capture. Features of these modules may vary but the core idea is to start a timer to provide timestamp reading feature when an edge capture detects a rising or falling edge. To extend this core idea to capture multiple channel edges, the firmware might be required to configure several timers and captures according to the digit input characteristics and accuracy requirements. Then the firmware has to deal with edge capture interrupts generated by captures. To make sure the accuracy of captured timestamps, those interrupts must be served as soon as possible without being delayed by other interrupt service routines. The more channels to be captured, the more interrupts occur. Some CPU may provide DMA features to capture timestamps without generating interrupts. But that requires extra configuration on DMA modules and not low cost CPUs (such as most 8-bit MCUs) cannot provide this feature.

With the solution in this invention, once the capture module is started, there is only one interrupt generated at the end of the capture procedure. In addition, this solution can capture several timestamps for a single channel for further software filter.

Detailed Description of the Invention

Figure 2 Capture module behavior

Figure 2 illustrates the strategy of the capture module. Once the capture module receives the “start capture” command from the CPU, it starts a timer which increases an internal counter according to the capture module’s clock tick. Assume the clock tick is 1 microsecond, then the counter value increases every 1 micros...