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Embedded EPI by FIN Oxidation

IP.com Disclosure Number: IPCOM000247048D
Publication Date: 2016-Jul-29
Document File: 3 page(s) / 116K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method to reduce the size of the FIN in source/drain (S/D) relative to the FIN under gate by oxidizing the FIN and then removing the oxide during epitaxy (EPI) preclean.

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Title

Embedded EPI by FIN Oxidation

Abstract

Disclosed is a method to reduce the size of the FIN in source/drain (S/D) relative to the FIN under gate by oxidizing the FIN and then removing the oxide during epitaxy (EPI) preclean.

Problem

The process to embed strained source/drain (S/D) in a Silicon on Insulator (SOI) FIN is difficult. The problems include:


• FIN height equals SOI thickness

• FIN Recess control results in not enough Si (FIN) remaining

• Si movement during prebake before epitaxy (EPI) causes pitting defects

One possible solution is to grow epi from substrate (i.e., recessing buried oxide (BOX)). It is difficult to ensure smooth transition between epi growing up from substrate and epi growing sideways from FIN. Another option is lateral growth from Fin to Fin; however, this is S/D space dependent and defects in S/D occur due to lateral growth against BOX.

Solution/Novel Contribution

The novel contribution is a method to reduce the size of the FIN in S/D relative to the FIN under gate by oxidizing the FIN and then removing the oxide during EPI preclean. After a strained epi (i.e., Silicon Germanium (SiGe)) is grown, a portion of channel will be strained by SiGe and the remaining FIN will be stretched by SiGe. The net is a strained FIN channel.

Method/Process

The process flow in a preferred embodiment follows:


1. Regular flow up to Gate Patterning
2. Block N (Litho)

3. Spacer RIE (down to BOX)

4. Resist Strip

5. Oxide Clean

6. Oxidation

7. Insit...