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Brim and Barrier BGA

IP.com Disclosure Number: IPCOM000247966D
Publication Date: 2016-Oct-14
Document File: 5 page(s) / 477K

Publishing Venue

The IP.com Prior Art Database

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Page 01 of 5

Brim and Barrier BGA

Background

In conventional Ball Grid Array (BGA) package like flip chip Ball Grid Array (fcBGA) package, heat transfer is a crucial factor of a reliable and performing semiconductor device. Figure 1 shows the typical heat flow of an fcBGA package without heat sink solution. A typical solution to heat transfer is to use a heat sink solution to dissipate the heat evenly, involving using a ring type heat sink, top heat sink and thermal interface material (TIM). But, the heat sink solution being a cost driver is the main intention of this document to describe alternatives to this heat sink solution to drive cost down.

Figure1: Photo Courtesy of TI Publication

Singulation based fcBGA package normally uses the capillary under-fill method while molded underfill though feasible, has no cost benefit. Thus this document presents a low cost packaging solution using dams and low viscosity encapsulant solving the problem of the mentioned heat sink solution being a cost driver. The 4 driving flows of concept applicable to fcBGA packages are (a) exposed die version, (b) non-exposed die (c) heat sink solution, and
(d) selective SR-openings for Package on Package (PoP) applications - will be explained in details in the next section which are applicable to strip-type package.

Description

Figure 2A: Substrate in 3D View Figure 2B: Substrate in 2D View

Figure 2C: Flipped Chip mount on substrate in 2D View.

The first 3 common steps are where the substrate has SR openings in figure 2A's light orange area consisting of bond pads for chip attachment and dams for encapsulation purpose. Figure 2B is the 2D view where dark orange area are dams, light orange area are bond pads and light blue areas are solder resist for protection from external environment. Next, in figure 2C, flipped-chip in green is placed on the substrate in blue, where reflows occurs between the solder bumps of chip and the bond pads of substrate.


Page 02 of 5

Brim and Barrier BGA

The first flow of concept is the exposed die version:

Figure 3A: Option 1 using 1 layer of liquid encapsulant in 2D View.

Figure 3B: Option 2 using 1 layer of liquid encapsulant and 1 layer of underfill in 2D View.

Figure 3C: After reflow, ball attachment and singulation are completed in 2D View.

Figure 3D: After reflow, ball attachment and singulation are completed in 3D View.

After the flipped-chip is mounted on the substrate, the first option of encapsulation according to figure 3A is to inject one layer of encapsulant (grey area in figure 3A) from the substrate's bond pad till the top of the chip but not covering the top of the chip. The second option of encapsulation according to figure 3B, is to inject one layer of capillary underfill (black area in figure 3B) along the lateral reflow area, and inject one layer of encapsulant (grey area in figure 3B) from above the layer of capillary underfill to the top of the chip , but not covering the top of the chip. Next, solder balls are attache...