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eWLB PoP with Stepped Interposer Disclosure Number: IPCOM000247985D
Publication Date: 2016-Oct-14
Document File: 7 page(s) / 652K

Publishing Venue

The Prior Art Database

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This is the abbreviated version, containing approximately 27% of the total text.

Page 01 of 7

eWLB PoP with Stepped Interposer


Embedded Wafer Level Ball Grid Array (eWLB) is a packaging technology for integrated circuits, which is a further development of Wafer Level Ball Grid Array (WLB) technology. The main advantage of the eWLB technology is to allow fan-out and more space for interconnect routing which results in chips with a high number of interconnects. In contrast to the conventional Wafer Level Packaging (WLP) technologies realized on a silicon wafer, the eWLB technology produces chips on an artificial wafer. Therefore a front-end-processed wafer is diced in the eWLB technology and the singulated chips are placed on a carrier. The distance between the chips on the carrier can be adjusted, which is usually larger than on the silicon wafer in the (WLP) technologies.

In Fig. 1, the processing steps of a eWLB Package-on-Package (PoP) structure is shown as a prior art of eWLB-PoP with PCB bar and an interposer substrate. In Fig. 1A, a metal carrier with heat sensitive tape is prepared and then a die is mounted onto the carrier in the die attach process. Then, four pieces of PCB bar are individually picked and placed on the left and right sides of the die as shown in Fig. 1B. The disadvantage of higher tolerance in the relative placement offset is expected in the process. In Fig. 1C, molding material is applied to the package in which the die and PCB bars are sealed inside. In Fig. 1D, the metal carrier with heat sensitive tape is removed by carrier removal process. In Fig. 1E, a portion of the mold is removed on the top of the PCB bar by laser ablation, and the PCB bars are exposed on the top surface of the package and ball pads are thus exposed in the removal positions. Due to a relative placement offset to each PCB bar, a high risk of misalignment is expected in the process, in which a longer set-up for a buy-off & in-process monitoring system is necessary. Meanwhile, a redistribution layer (RDL) is formed on the bottom surface of the package, with solder balls attached on the bottom surface. In Fig. 1F, a laminate interposer is attached on the top surface of the package, with connection to the PCB bars through solder balls on the ball pads. This laminate interposer is also used as the substrate for the package on the top. The process of interposer attach is currently a critical process and faces issues related to warpage and wetting. In the prior art shown in Fig. 1, additional costs are needed since a separate laminate interposer and thus interposer attach and removal processes are necessary.

Page 02 of 7

eWLB PoP with Stepped Interposer


This invention discloses a method of manufacturing a stepped interposer eWLB-PoP structure, in which the stepped interposer also serves as a carrier for the eWLB-PoP structure. In contrast to the traditional eWLB-PoP technologies, this invention has the advantage of eliminating the use of the interposer attach process and PCB bars, and thus saving costs durin...