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Molded Interconnect Substrate with Resin Bumps

IP.com Disclosure Number: IPCOM000248046D
Publication Date: 2016-Oct-21
Document File: 4 page(s) / 245K

Publishing Venue

The IP.com Prior Art Database

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Molded Interconnect Substrate with Resin Bumps

Background

There are conventional PoP package structures use the laminate based interposer with pre- attached copper core solder ball. The interposer is attached by means of thermal compression bonding or reflow process. Using the thermal compression bonding (TCB) method is inefficient in terms of time and cost, while the mount and reflow process (MR) is plagued with general problems such as non-wetting and solder bridging occurrences. The concerns aggravated in fine pitch designs. Thus, jig or automation assist is always required during mounting process to have copper core solder balls properly intact. The conventional PoP structures can be depicted as follows: (a) Flip chip PoP with laser ablation in Figure 1A (b) Flip chip PoP with core solder ball in Figure 1B (c) Flip chip PoP Cu Post in Figure 1C.

Conventional PoP Structures

Figure 1A: Flip chip PoP with laser ablation

The openings are created into mold surface of package using the laser groove technology, and have the copper core solder balls to be stacked in as pillar support for connection with the laminate interposer.

Figure 1B: Flip Chip PoP with Core Solder Ball

The interposer is overlaid and connected with the embedded core copper solder balls.

Figure 1C: Flip Chip PoP Cu Post

The interposer is connected with the embedded pillars by means of solder ball attach.


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Molded Interconnect Substrate with Resin Bumps

The problems addressed in conventional PoP interposer attach can be resolved through the ingenious modification on the molded interconnect substrate (MIS), whereby the MIS consists of plated depressions or cavities inversely converted as nodules, as equivalent to the rigid interconnect bumps in lieu of the typical solder balls or copper solder balls in PoP interposer application. This MIS with plated resin or coated mold bumps is adoptable in structure integration as interposer for flip chip PoP design, or useable as it is as the substrate in wire bond and flip chip application. The process flow of each is explained in the next section.

Description

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