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Method of manufacturing substrate w/ cavity or trench in embedded pattern substrate

IP.com Disclosure Number: IPCOM000248394D
Publication Date: 2016-Nov-24
Document File: 6 page(s) / 462K

Publishing Venue

The IP.com Prior Art Database

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 38% of the total text.

Page 01 of 6

Method of manufacturing substrate w/ cavity or trench in embedded pattern substrate

Background

For flip chip or PoP, the semiconductor die having bumps on the active surface is attached on the substrate. The gap between the die and substrate can be filled with an underfill material for structural support and environmental isolation. Excess underfill material typically overflows or bleeds out beyond the die attach area. The excess underfill material may unintentionally cover other portions such as contact pads for top ball in PoP.

To solve the problems, as shown Fig. 1, disclosed is a substrate having a trench to prevent underfill overflow and manufacturing method thereof. The trench adjacent to die attach area is formed in a substrate, wherein different height constrains flow of underfill material.

In one of embodiments, a substrate for Package on Package (PoP), particularly having 3d profile pattern to prevent underfill overflow is disclosed. The step structure is formed around the die attach area, wherein different height constrains flow of underfill material.

The disclosed structure can provide reduced pitch and protection against underfill overflow As shown in Fig. 2, it has been discovered that the trench facilitates EMC (Epoxy Molding Compounds) filling. EMC is molding material generally used for encapsulation. The encapsulation may not cover gap underneath a component because the gap is typically narrow. The trench can expand the gap, so that the EMC can flow inside the gap without disturbance. Void is prevented and reliability is increased.


Page 02 of 6

Method of manufacturing substrate w/ cavity or trench in embedded pattern substrate

Description

Fig. 3 ~ Fig. 10 shows one embodiment of present invention, particularly forming trenches for preventing underfill overflow or facilitating EMC filling.

Referring now to Fig. 3, providing a carrier (detach core) phase. The carrier can include core, a carrier top side metal and a carrier bottom side metal. The core can include SUS plate, FR4 plate, or polymer reinforced plate as examples. The carrier top side metal and the carrier bottom side metal are detachable from the core. The carrier top side metal and the carrier bottom side metal are preferably copper.

Fig. 4 shows forming M1 layer on the carrier. The photoresist (PR) pattern for forming the M1 layer is formed on the carrier. The PR is patterned and openings are formed depending on the design and function of semiconductor device. The opening is plated with the conductive metal such as copper and then removing the PR is conducted. The M1 layer is retained on the carrier.

Fig. 5 shows forming PR for forming cavity. The photoresist layer is a structure having an insulation material including a dry film (DF). The PR is formed directly on the carrier. After that, the PR is developed to have a pattern for trenches.

There are trench for underfill overflow and trench for EMC filling. Both can be formed together or respectively al...