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Low Warpage & Low Cost Solution for Interposer Substrate

IP.com Disclosure Number: IPCOM000248397D
Publication Date: 2016-Nov-24
Document File: 2 page(s) / 489K

Publishing Venue

The IP.com Prior Art Database

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Low Warpage & Low Cost Solution for Interposer Substrate

Background

Stepped Interposer PoP is contributing to provide a viable solution for a thinner PoP integrated package structure, such that the attached IC chip on the substrate is positioned

within the stepped opening created in the underlying interposer. The use of
within interposer would narrow the distance or gap in between the contact pads of interposer with the contact pads of substrate, thus smaller conductive bumps can be used to electrica couple the interposer and substrate in PoP structure. This indicates higher density of I/O

count and flexibility of design.

The existing stepped interposers are having the

structure at approximately18┬Ám in depth heat dissipation can be added within the

inside stepped opening as shown in Figure 1B. stepped opening

with the contact pads of substrate, thus smaller conductive bumps can be used to electrically

    stepped opening formed within the PPG
as shown in Figure 1A. A thin heat sink layer to aid

stepped opening, it appears as half-etch Cu layer

approximately 18um of PPG stepped opening depth

in PPG stepped opening

Description

Instead of creating PPG stepped opening
thickening approach as shown in Figure 2A to form opening window from end to end solder

resist in x-axes by extending the thickness of the bottom solder resist portion, which is alike

to valance.

, this new invention discloses the use of passivation

With the thickening of solder resist, the created PPG
completely filled with thermal conductive material such as...