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An Automatic Method to Categorize and Analyze Missed Code Coverage

IP.com Disclosure Number: IPCOM000248896D
Publication Date: 2017-Jan-20
Document File: 5 page(s) / 145K

Publishing Venue

The IP.com Prior Art Database

Abstract

In current chip design and verification work, code coverage is a very effective way to analyze both design and verification codes. But current code coverage results only report missed coverage items without much information. In this proposal, missed code coverage items are processed by the following steps: unifying missed coverage items, extracting topological structure, tracing and analyzing items and reporting analyzed results. By this method, missed code coverage items are analyzed automatically and users can use the results to reduce the effort they originally spend on code coverage analysis.

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An Automatic Method to Categorize and Analyze Missed Code Coverage

In current chip design and verification work, code coverage is a very effective way to analyze both design and verification codes. But current code coverage results only report missed coverage items without much information. Generally, analyzing a particular missed code coverage item could benefit following actions: ignoring this missed item, removing the related redundant logic, improving the design accordingly, improving the verification stimulus and so on.

As complication of integrated circuit increased, code coverage analysis becomes more and more time-consuming. Developing an effective way to simplify code coverage analysis becomes essential and significant.

Several code coverage analysis methods have been proposed for verification of an integrated circuit design. Biswas, Srigiriraju, Seibulescu, and Nagda (2013) proposed a method in which code coverage collected from multiple random simulation runs is analyzed to generate directed stimuli using symbolic variables and expressions generated for hardware code of the design. Junior and da Silva (2007, March) categorized and

associated missed coverage items with action items based on function names.

This invention introduces a new method to summarize and categorize all missed code coverage items and then accelerate whole process of coverage debugging. This invention focuses on key point of a code coverage group which constructs from relative missed items that can finally benefit our development for both Register Transfer Level(RTL) design and functional verification of integrated circuit design. It will seriously reduce the effort engineers originally spend on code coverage analysis and facilitate to find solutions about removing those missed code coverage items. It contributes on leverage efficiency of design and verification debugging.

Previous code coverage analysis methods for integrated circuit design focus on building relationship between miss coverage items and un-tested logic code or test vectors to improve verification. Inspired from software engineering, the relationships between missed coverage items themselves are analyzed in the proposed invention to find key points based on netlists. Therefore, the proposal benefits integrated circuit design verification by reducing items need to be covered intrinsically.

An interesting fact existed in code coverage report is that some of missed code coverage items are highly related. There are some possible circumstances listing as following:

1) A signal which is never toggled may generate a missed expression coverage item.

2) A missed expression coverage item probably is the root cause for a missed true part of a code block.

3) A signal which is never toggled may result in a series of signals not toggling.

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This proposal provides a method which can automatically analyze interrelationships across missed code coverage items, classify them into groups, and rank missed items in...