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Convex surface substrate with insulation layer

IP.com Disclosure Number: IPCOM000249325D
Publication Date: 2017-Feb-16
Document File: 3 page(s) / 297K

Publishing Venue

The IP.com Prior Art Database

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This is the abbreviated version, containing approximately 54% of the total text.

Convex surface substrate with insulation layer

Background

The conventional structure of the embedded trace substrate (ETS) is shown in Fig. 1(a). The

top surface of the ETS has a convex metal layer embedded inside the substrate. The

magnified structure of the convex metal layer is shown in Fig 1 (b).

Fig. 1 (a) conventional structure of the embedded trace substrate (ETS); (b) the convex metal layer from the top surface

The main defect of the conventional ETS is that the convex metal layer is extended outside

the substrate and a large portion of the side surface of the bump pad is exposed to the external

environment. In this way, it is possible to damage the protruded metal layer and further to

influence the function of the ETS. In addition, the conventional ETS structure has a higher

risk to form solder bridges so that there is a limitation for fine bump pitch.

Description

The subject invention introduces a polyimide (PI) as an insulation layer on the top of ETS to

protect the protruded metal layer from the external environment and meanwhile to prevent

from forming solder bridges for achieving fine bump pitch.

In Fig. 2, the structure of the subject invention is shown. A polyimide (PI) as the insulation

layer is formed on the top of the substrate, covering the top surface of the substrate material

completely. The PI layer also partially covers the side surfaces of the metal bump pads and

also covers completely the top surface of the metal trace between thereof. As a result, the

metal layer covered by the insulation layer is not affected from the external environment.

Meanwhile, a portion of the bump pad is still protruded outside for electrical connection.

Fig. 2 The structure of the subject invention with a polyimide (PI) as an insulation layer on the top of the substrate

The subject invention has several advantages over the conventional ETS. First, there is no

risk to form solder bridges between the adjacent bump pad and trace. Shown in Fig. 3(a), the

Convex surface substrate with insulation layer

trace is close to the bump pad in the conventional ETS and thus there is a higher risk to form

bump bridges. In contrast, in Fig. 3(b), the trace is completely covered by the PI insulation

layer while only a portion of the bump pad is exposed outside in the proposed structure. In

this way, solder will not spread on the PI insulation layer. Therefore, it is much easier to

achieve fine bump pitch in the subject invention.

Fig. 3 (a) bump bridges formed in the conventional ETS; (b) no risk to form bump bridge in the subject invention

Second, the line and space width between the adjacent bump pad and trace can be

significantly reduced. Shown in Fig. 4(a), the line and space width in the conventional ETS

has to be kept more than 10um to prevent from forming bum...