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Thermal Dissipation Structures for FC-PBGAs

IP.com Disclosure Number: IPCOM000249840D
Publication Date: 2017-Apr-14
Document File: 2 page(s) / 61K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a unique cooling path for the power device within the flip chip plastic ball grid array FC-PBGA package. The novel method for planning the laminate design optimizes the heat dissipation without increasing package manufacturing costs.

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Title Thermal Dissipation Structures for FC-PBGAs Abstract Disclosed is a unique cooling path for the power device within the flip chip plastic ball grid array FC-PBGA package. The novel method for planning the laminate design optimizes the heat dissipation without increasing package manufacturing costs. Problem The practice of adding power modules to flip chip plastic ball grid arrays (FC-PBGAs) makes cooling the application-specific integrated circuit (ASIC) die more difficult. The conduction of heat from these power devices to the primary ASIC exacerbates the existing junction temperature problem. Solution/Novel Contribution The novel contribution is a unique cooling path for the power device within the FC- PBGA package. A carefully chosen laminate geometry can separate the cooling path of the power device from the path that the ASIC die use. This method for planning the laminate design optimizes the heat dissipation without increasing package manufacturing costs. Method/Process The solution presents a two-dimensional package with the following components:

• First die • Power module • Laminate • Lid

A thermal path from the power module is independent from the thermal path of the ASIC die. This includes a thermal dissipation pad. The path connects the power device to the dissipation pad. The design provides electrical and thermal isolation of this pad from the path of the ASIC die. In addition, there is a connection from the power module’s thermal path in the laminate to t...