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CAPACITIVE FINGER PRINT SENSOR PACKAGE USING GLASS CORE OR SILICON CORE SUBSTRATE WITH THROUGH GLASS VIAS (TGV) OR THROUGH SILICON VIAS (TSV) AND THIN FILM METAL SENSOR TRACES

IP.com Disclosure Number: IPCOM000250102D
Publication Date: 2017-Jun-01
Document File: 7 page(s) / 107K

Publishing Venue

The IP.com Prior Art Database

Related People

Jason Goodelle: INVENTOR [+3]

Abstract

Presented here is the concept for a chip on interposer package that utilizes chip on glass core or silicon core substrate technology using thin film and fab metal / dielectric processing to create a packaged finger print sensor device. This concept solves several critical issues with current capacitive finger print sensor packaging technologies.

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CAPACITIVE FINGER PRINT SENSOR PACKAGE Jason Goodelle

Copyright © 2017 Synaptics Incorporated, All Rights Reserved. Page: 1 of 7

Information contained in this publication is provided as-is, with no express or implied warranties, including any warranty of merchantability, fitness for any particular purpose, or non-infringement. Synaptics Incorporated assumes no liability whatsoever for any use of the information contained herein, including any liability for intellectual property infringement. This publication conveys no express or implied licenses to any intellectual property rights belonging to Synaptics or any other party. Synaptics may, from time to time and at its sole option, update the information contained herein without notice.

CAPACITIVE FINGER PRINT SENSOR PACKAGE USING GLASS CORE OR SILICON CORE SUBSTRATE WITH

THROUGH GLASS VIAS (TGV) OR THROUGH SILICON VIAS (TSV) AND THIN FILM METAL SENSOR TRACES

1. Inventor(s): Jason Goodelle Brett Dunlap Paul Wickboldt

2. Synaptics Incorporated, San Jose, CA, USA

3. Short Summary Presented here is the concept for a chip on interposer package that utilizes chip on glass core or silicon core substrate technology using thin film and fab metal / dielectric processing to create a packaged finger print sensor device. This concept solves several critical issues with current capacitive finger print sensor packaging technologies.

4. Technological advantages Current finger print sensor technology utilizes either a plastic ball grid array (PBGA) substrate within which transmit and receive sensor traces are located on the top two layers of a 4 layer substrate or a chip attached to a flexible circuit within which the sensor traces are created. The BGA substrate sensor design utilizes two build up layers on either side of a copper clad core, typically called a 4 layer substrate. The core consists (or can consist) of glass reinforced epoxy (FR4) or glass reinforced bismaleimide triazine (BT). The top and bottom trace layers can be created by plating mechanically or laser drilled holes to create layer to layer connections followed by etched pattern forming (subtractive process, common for two layer substrates). Multiple layer substrates can be formed by laminating multiple cores together and repeating the previous steps. Also, multiple conductor layers can be built up on a single drilled core by successively laminating dielectric, drilling micro vias (usually laser), plating metal and etching conductor patterns. This process is called a build-up process and is more expensive than a fully subtractive or laminated process. Even the best build up processes become limited in terms of yield and process control below 15um lines / 30 um spaces rules. Also, the trace morphology is strongly influenced by the topography (smoothness) of the underlying dielectric and thickness control and conductor cross section becomes very difficult to control using standard plating (trace thickness is very hard to control using standard...