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ON-PACKAGE VOLTAGE REGULATOR WITH ACTIVE IMPEDANCE CONTROL

IP.com Disclosure Number: IPCOM000250143D
Publication Date: 2017-Jun-05
Document File: 4 page(s) / 93K

Publishing Venue

The IP.com Prior Art Database

Abstract

A power delivery system and method for high performance microprocessors that includes a 'VR on-chip' solution is disclosed. The system includes an auxiliary voltage regulator connected in parallel with the main voltage regulator at the point of load. The auxiliary voltage regulator acts as a shunt impedance that is in parallel with the original PDN impedance to reduce the total output impedance seen at the micro-processor. This method targets a certain range of frequencies starting from the main regulator bandwidth frequency up to the frequency at which the on-package capacitors start to dictate the PDN impedance. The active impedance control of the auxiliary regulator mitigates the excessive droop along the power delivery path. The system having a small size, low profile, reduced heat generation and low cost may easily be integrated into a microprocessor package. The total power conversion efficiency may be increased by 7%~8% compared to existing technologies.

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ON-PACKAGE VOLTAGE REGULATOR WITH ACTIVE IMPEDANCE CONTROL

ABSTRACT

A power delivery system and method for high performance microprocessors that includes

a ‘VR on-chip’ solution is disclosed. The system includes an auxiliary voltage regulator

connected in parallel with the main voltage regulator at the point of load. The auxiliary voltage

regulator acts as a shunt impedance that is in parallel with the original PDN impedance to reduce

the total output impedance seen at the micro-processor. This method targets a certain range of

frequencies starting from the main regulator bandwidth frequency up to the frequency at which

the on-package capacitors start to dictate the PDN impedance. The active impedance control of

the auxiliary regulator mitigates the excessive droop along the power delivery path. The system

having a small size, low profile, reduced heat generation and low cost may easily be integrated

into a microprocessor package. The total power conversion efficiency may be increased by

7%~8% compared to existing technologies.

BACKGROUND

High performance microprocessor technology is trending toward the use of low voltage,

high current and high power supply. For example, the latest generation GPU or ASICs run at a

low voltage of 0.8V and at a maximum current of over 300A. With this technology trend a

fundamental physical limit with the traditional board-level voltage regulator (VR) design is that,

the voltage droops across the power delivery network. The voltage droop becomes more and

more excessive from the VR output to the processor die. This type of voltage droop is reflected

to the frequency domain due to an increase of power delivery network (PDN) impedance.

However, in order to guarantee signal integrity and power integrity of a microprocessor, the PDN

impedance must be well maintained below a target impedance level over a wide frequency range

of interest. With traditional on-board VR power solutions, the target impedance cannot be met

due to excessive voltage droop across the various components such as the PCB power planes,

processor socket contacts, processor package substrate vias and limited VR bandwidth. In order

to tackle the voltage droop problem, the most effective solution is to move the voltage regulator

as close to the microprocessor die as possible. 'VR in-package' or 'VR on-chip' solutions have

come up, in which the voltage regulators are integrated into the micro-processor package or chip

die to minimize the voltage droop or in other words PDN impedance. However, the integration

of a bulky voltage regulator into a micro-processor package is extremely challenging as the

package size is typically limited by available packaging technologies. Hence, in order to reduce

the VR size and fit it into the package, the VR switching frequency has to be increased at least

one order higher than the existing board-level VR. Increasing the switching frequency by an

order or more, adds more switching losses. This reduces the total efficien...