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Inductor Under-Pad for Millimeter-Wave ESD Protection

IP.com Disclosure Number: IPCOM000250221D
Publication Date: 2017-Jun-12
Document File: 2 page(s) / 138K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a chip design that meets the zero-capacitance requirement without an electrostatic-sensitive device (ESD). The novel solution it to build and inductor pad under the power pad (VSS or VDD) for millimeter-wave ESD protection.

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Title Inductor Under-Pad for Millimeter-Wave ESD Protection Abstract Disclosed is a chip design that meets the zero-capacitance requirement without an electrostatic-sensitive device (ESD). The novel solution it to build and inductor pad under the power pad (VSS or VDD) for millimeter-wave ESD protection. Problem Radio Frequency (RF) input and output cannot have an electrostatic-sensitive device (ESD) because the capacitor acts as the short circuit at AC if the frequency is beyond 30GHz (Millimeter wave). Without the ESD device, however, the chip suffers the low yield issue. An inductor is a good choice for MM-wave ESD protection because it acts as an open circuit at AC and is a short circuit during the ESD event; however, it often occupies the large area of a chip. Solution/Novel Contribution The novel solution it to build and inductor pad under the power pad (VSS or VDD) for millimeter-wave ESD protection. One terminal is connected to the power pad, another terminal is connected to the signal pad and RF IN or RF Out. This meets the zero- capacitance requirement with no ESD. Figure 1: Core concept

Method/Process The approach is to build the inductor under the existed power pad. The inductor does not increase the chip size. Figure 2: Transmission Line Pulse (TLP) Measurement for Inductor (W/L 5/500) Voltage across the inductor is under 2kV HBM (1.2A) is ~3.4V, which is below the voltage to damage the protect device.

Figure 3: Building the inductors under the signal pad, power...