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Making Early SD contact for FINFET

IP.com Disclosure Number: IPCOM000250530D
Publication Date: 2017-Jul-28
Document File: 3 page(s) / 281K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method to form an early source drain (SD) contact based semiconductor transistor. This method reduces the trench contact (TS) litho steps and produces lower contact resistance than the process on record does.

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Title Making Early SD contact for FINFET Abstract Disclosed is a method to form an early source drain (SD) contact based semiconductor transistor. This method reduces the trench contact (TS) litho steps and produces lower contact resistance than the process on record does. Problem Contact patterning, after replacement metal gate (RMG) damages source drain (SD) epitaxy (epi), causes dopant loss and forms a contact-only SD epi top area. This makes wrap-around-SD contact impossible. Because only the SD top region has metallic contact, contact resistance reduction is limited. Solution/Novel Contribution The novel solution is to form an early SD contact based semiconductor transistor. The solution comprises the following methods:

1. Move the inter-layer dielectric (ILD) step from post-SD to pre-SD processes 2. Form SD epi after contact patterning 3. Form metallic contact right after SD epi growth, and then form the RMG

An early contact scheme is possible for high-temperature durable silicides such as TiSix, CoSix, and TaSix, which is stable up to SD activation and RMG thermal budget. * Method/Process The method to form an early SD contact based semiconductor transistor consists of the following sequence:

1. FIN and Shallow Trench Isolation (STI) formation 2. Dummy PC (gate) formation 3. First ILD formation 4. P-type SD contact patterning 5. P-type SD epi formation 6. Metallic contact formation for P-type SD 7. Second ILD formation 8. N-type SD contact patterning 9. N-type SD epi...