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MRAM Array with Air Gap Dummy and Method of Fabrication the Same

IP.com Disclosure Number: IPCOM000250532D
Publication Date: 2017-Jul-28
Document File: 4 page(s) / 71K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method to produce a magnetic random access memory (MRAM) array with an air gap dummy and method of fabrication for the same.

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Title MRAM Array with Air Gap Dummy and Method of Fabrication the Same Abstract Disclosed is a method to produce a magnetic random access memory (MRAM) array with an air gap dummy and method of fabrication for the same. Problem No magnetic tunnel junction (MTJ) dummy is allowed in the logic region of a memory device. Due to MTJ pattern density differences, Low-K Chemical Mechanical Planarization (CMP) have poor uniformity which leaves no process margin to MTJ top connection. Figure 1: Illustration of the problem

A method is needed to prevent Low-K CMP dishing in the logic region by adding a dense MTJ dummy around a magnetic random access memory (MRAM) array without cap/leakage impact Solution/Novel Contribution The novel contribution is a method to produce an MRAM array with an air gap dummy and method of fabrication for the same. The core novel features include:

• Dense MTJ dummy around array to form an air gap between dummies • CMP and etch back to expose TE • Removal of Ru TE of dummy and seal the air gap TE • Form top connection and/or Cu line

Method/Process The following figures and associated steps represent the implementation method for the solution.

Figure 1: 1. Put dummy all over logic area to get better Low-K CMP performance 2. TE MTJ dummy in logic area is removed after Low-K CMP to prevent potential

leakage or process/contamination issues 3. Air gap to recover low-k

Figure 2: Low-K deposition: a full dummy could lead to a more uniform surface and eliminate the st...